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參數(shù)資料
| 型號(hào)： | S3P8075XX-QT |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 20 MM, QFP-64 |
| 文件頁(yè)數(shù)： | 28/30頁(yè) |
| 文件大小： | 217K |
| 代理商： | S3P8075XX-QT |
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S3C8075/P8075
PRODUCT OVERVIEW
1-7
Table 1-2. S3C8075 Pin Descriptions (64-SDIP)
Pin
Name
Pin
Type
Pin
Description
Circuit
Number
SDIP Pin
Number
Share
Pins
P0.0–P0.7
I/O
I/O port with nibble-programmable pins;
Input or push-pull, open-drain output and
software assignable pull-ups; also
configurable as external interface address
lines A8-A15.
E
1–7, 64
A8–A15
P1.0–P1.7
I/O
Same general characteristics as port 0; also
configurable as external interface
address/data lines AD0–AD7.
E
56–63
AD0–AD7
P2.0–P2.3
P2.4–P2.7
I/O
I/O port with bit-programmable pins; Input
or push-pull output. Lower nibble pins 0–3
are configurable for external interface
signals; upper nibble pins 4–7 are bit-
programmable for external interrupts INT0–
INT3. P2.4 can also be used for external
WAIT input.
D-1 (lower
nibble);
D-1 (upper
nibble; with
noise filter)
40–47
AS, DS,
DM, R/W
INT0–INT3,
WAIT
P3.0–P3.7
I/O
I/O port with bit-programmable pins; Input
or push-pull output. Alternate functions
include software-selectable UART transmit
and receive on pins 3.7 and 3.6, timer B
and timer A outputs at pins 3.5 and 3.4, and
timer D and C clock inputs at pins 3.1 and
3.0.
D-1
24– 31
TCCK,
TDCK, TA,
TB, TxD,
RxD
P4.0–P4.7
I/O
I/O port with bit-programmable pins; Input
or push-pull output; software-assignable
pull-ups. Alternate functions include
external interrupt inputs INT4-INT11 (with
interrupt enable and pending control) and
timer C and D gate input at P4.0 and P4.1.
D
(with noise
filter)
8–15
INT4–
INT11,
TCG, TDG
P5.0–P5.7
I/O
I/O port with nibble-programmable pins;
Input or push-pull, open-drain output;
software-assignable pull-ups.
E
21, 22,
50–55
–
P6.0–P6.7
O
Output port with nibble-programmable pins;
push-pull, open-drain output; software-
assignable pull-ups.
E-8
32–39
–
RxD
I/O
Bi-directional serial data input pin
–
24
P3.7
TxD
I/O
Serial data output pin
–
25
P3.6
TA, TB
I/O
Timer A and B output pins
4
27, 26
P3.4, P3.5
TCCK, TDCK
I/O
Timer C and D external clock input pins
D-1
30, 31
P3.0, P3.1
INT0–INT3
I/O
External interrupts. I/O pin 2.4 (share pin
with INT0) is also configurable as a
WAIT
signal input pin for the external interface.
D-1
(with noise
filter)
40–43
P2.4–P2.7
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