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參數(shù)資料
| 型號： | S3P72G9XX-QX |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 4.19 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, QFP-100 |
| 文件頁數(shù)： | 23/26頁 |
| 文件大小： | 181K |
| 代理商： | S3P72G9XX-QX |
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PRODUCT OVERVIEW
S3C72G9/P72G9
1-6
Table 1-1. S3C72G9 Pin Descriptions (Continued)
Pin Name
Pin Type
Description
Number
Share Pin
K0–K3
I/O
External interrupt (triggering edge is selectable)
14–11
P0.0–P0.3
V
DD
–
Main power supply
15
–
V
SS
–
Ground
16
–
RESET
I
Reset signal
22
–
CA, CB
–
Capacitor terminal for voltage boosting
4, 5
–
VCL1–VCL2
VCL3–VCL5
–
LCD power supply
99–100
1–3
–
TEST2
I
Test input (must be connected V
SS)
6
–
X
IN, XOUT
–
Crystal, ceramic or RC oscillator pins for system
clock
18, 17
–
XT
IN, XTOUT
–
Crystal oscillator pins for subsystem clock
20, 21
–
TEST1
I
Test input (must be connected to V
SS)
(2)
19
–
NOTES
1.
Pull-up resistors for all I/O ports are automatically disabled if they are configured to output mode.
2.
Refer to chapter 16 for OTP version.
Table 1-2. Overview of S3C72G9 Pin Data
Pin Name
Share Pins
I/O Type
Reset Value
Circuit Type
P0.0–P0.3
TCLO1/K0,
TCLO1/K1
BUZ/K2, BUZ/K3
I/O
Input
E-2
P1.0–P1.3
INT0, INT1, INT2, INT4
I/O
Input
E-2
P2.0–P2.1
CLO, TCL1
I/O
Input
E-2
P2.2–P2.3
–
I/O
Input
E-2
COM0–COM15
–
O
Low
H-6
SEG0–SEG55
–
O
Low
H-6
V
DD
–
V
SS
–
RESET
–
I
–
B
CA
–
CB
–
VLC1–VLC5
–
X
IN, XOUT
–
XT
IN, XTOUT
–
TEST1, 2
–
I
–
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