參數(shù)資料
型號： S29WS128N0LBFI110
廠商： Spansion Inc.
英文描述： 256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY
中文描述： 256/128/64兆位的CMOS 1.8伏只有同時讀/寫突發(fā)模式閃存
文件頁數(shù)： 92/99頁
文件大?。?/td> 1091K
代理商： S29WS128N0LBFI110
90
S29WS-N_00_G0 January 25, 2005
Adva nce
Information
12.1
Common Flash Memory Interface
The Common Flash Interface (CFI) specification outlines device and host system software inter-
rogation handshake, which allows specific vendor-specified soft-ware algorithms to be used for
entire families of devices. Software support can then be device-independent, JEDEC ID-indepen-
dent, and forward- and back-ward-compatible for the specified flash device families. Flash
vendors can standardize their existing interfaces for long-term compatibility.
This device enters the CFI Query mode when the system writes the CFI Query command, 98h, to
address (BA)555h any time the device is ready to read array data. The system can read CFI in-
formation at the addresses given in Tables 12.3–12.6) within that bank. All reads outside of the
CFI address range, within the bank, returns non-valid data. Reads from other banks are allowed,
writes are not. To terminate reading CFI data, the system must write the reset command.
The following is a C source code example of using the CFI Entry and Exit functions. Refer to
the Spansion Low Level Driver User’s Guide (available on www.amd.com and
www.fujitsu.com) for general information on Spansion Flash memory software development
guidelines.
/* Example: CFI Entry command */
*( (UINT16 *)bank_addr + 0x555 ) = 0x0098;
/* write CFI entry command
*/
/* Example: CFI Exit command
*/
*( (UINT16 *)bank_addr + 0x000 ) = 0x00F0;
/* write cfi exit command
*/
For further information, please refer to the CFI Specification (see JEDEC publications JEP137-A
and JESD68.01and CFI Publication 100). Please contact your sales office for copies of these
documents.
Table 12.3. CFI Query Identification String
Addresses
Data
Description
10h
11h
12h
0051h
0052h
0059h
Query Unique ASCII string “QRY”
13h
14h
0002h
0000h
Primary OEM Command Set
15h
16h
0040h
0000h
Address for Primary Extended Table
17h
18h
0000h
Alternate OEM Command Set (00h = none exists)
19h
1Ah
0000h
Address for Alternate OEM Extended Table (00h = none exists)
Table 12.4. System Interface String
Addresses
Data
Description
1Bh
0017h
VCC Min. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
1Ch
0019h
VCC Max. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
1Dh
0000h
VPP Min. voltage (00h = no VPP pin present)
1Eh
0000h
VPP Max. voltage (00h = no VPP pin present)
1Fh
0006h
Typical timeout per single byte/word write 2N s
20h
0009h
Typical timeout for Min. size buffer write 2N s (00h = not supported)
21h
000Ah
Typical timeout per individual block erase 2N ms
22h
0000h
Typical timeout for full chip erase 2N ms (00h = not supported)
23h
0004h
Max. timeout for byte/word write 2N times typical
24h
0004h
Max. timeout for buffer write 2N times typical
25h
0003h
Max. timeout per individual block erase 2N times typical
26h
0000h
Max. timeout for full chip erase 2N times typical (00h = not supported)
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