參數(shù)資料
型號(hào): S29NS512P0PBJW003
廠商: SPANSION LLC
元件分類: DRAM
英文描述: MirrorBit Flash Family
中文描述: 32M X 16 FLASH 1.8V PROM, 80 ns, PBGA64
封裝: 8 X 9.20 MM, LEAD FREE, TFBGA-64
文件頁(yè)數(shù): 66/86頁(yè)
文件大小: 2234K
代理商: S29NS512P0PBJW003
66
S29NS-P MirrorBit
TM
Flash Family
S29NS-P_00_A1 February 20, 2007
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
10.4
Test Conditions
Figure 10.3
Test Setup
10.5
Key to Switching Waveforms
10.6
Switching Waveforms
Figure 10.4
Input Waveforms and Measurement Levels
Note
V
CC
and V
CCQ
must be ramped simultaneously for proper power-up.
Table 10.2
Test Specifications
Test Condition
All Speed Options
Unit
Output Load Capacitance, C
L,
(including jig capacitance)
30
pF
Input Rise and Fall Times
1.0 – 1.50
ns
Input Pulse Levels
0.0 – V
CC
V
Input timing measurement reference levels
V
CC
/2
V
Output timing measurement reference levels
V
CCQ
/2
V
C
L
Device
Under
Test
Waveform
Inputs
Outputs
Steady
Changing from H to L
Changing from L to H
Don’t Care, Any Change Permitted
Changing, State Unknown
Does Not Apply
Center Line is High Impedance State (High Z)
Table 10.3
V
CC
Power-Up with No Ramp Rate Restriction
Parameter
Description
Test Setup
Time
Unit
t
VCS
V
CC
Setup Time
Min
30
μs
t
RH
Time between RESET# (high) and CE# (low)
Min
200
ns
V
CC
0.0 V
Output
Measurement Level
Input
V
CC
/2
V
CCQ
/2
All Inputs and Outputs
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