February 20, 2007 S29NS-P_00_A1
S29NS-P MirrorBit
TM
Flash Family
53
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
device can only be used in the Persistent Protection Mode. When the device is set to Password Protection
Mode, DQ1 is required to be set to
1
and DQ2 is required to be set to
0
. DQ3 is programmed in the Spansion
factory. When the device is programmed to disable all PPB erase command, DQ3 outputs a
0
, when the lock
register bits are read. Similarly, if the device is programmed to enable all PPB erase command, DQ3 outputs
a
1
when the lock register bits are read. Likewise the DQ4 bit is also programmed in the Spansion Factory.
DQ4 is the bit which indicates whether Volatile Sector Protection Bit (DYB) is protected or not after boot up.
When the device is programmed to set all Volatile Sector Protection Bit protected after power up, DQ4
outputs a
0
when the lock register bits are read. Similarly, when the device is programmed to set all Volatile
Sector Protection Bit unprotected after power up, DQ4 outputs a
1
. Each of these bits in the lock register are
non-volatile. DQ15 – DQ5 are reserved and are
1
s.
For programming lock register bits refer to
Table 11.2
.
Notes
1. If the password mode is chosen, the password must be programmed and verified before setting the
corresponding lock register bit.
2. It is recommended that a sector protection method to be chosen by programming DQ1 or DQ2
prior to shipment
3. After the Lock Register Bits Command Set Entry command sequence is written, reads and writes
for Bank 0 are disabled, while reads from other banks are allowed until exiting this mode.
4. If both lock bits are selected to be programmed (to zeros) at the same time, the operation aborts.
5. Once the Password Mode Lock Bit is programmed, the Persistent Mode Lock Bit is permanently
disabled, and no changes to the protection scheme are allowed. Similarly, if the Persistent Mode
Lock Bit is programmed, the Password Mode is permanently disabled.
6. During erase/program suspend, ASP entry commands are not allowed.
7. Data Polling can be done immediately after the lock register programming command sequence (no
delay required). Note that status polling can be done only in bank 0.
8. Reads from other banks (simultaneous operation) are not allowed during lock register
programming. This restriction applies to both synchronous and asynchronous read operations.
After selecting a sector protection method, each sector can operate in any of the following three states:
1.
Constantly locked.
The selected sectors are protected and can not be reprogrammed unless PPB
lock bit is cleared via a password, hardware reset, or power cycle.
2.
Dynamically locked.
The selected sectors are protected and can be altered via software
commands.
3.
Unlocked.
The sectors are unprotected and can be erased and/or programmed.
These states are controlled by the bit types described in Sections
7.2
–
7.6
.
7.2
Persistent Protection Bits
The Persistent Protection Bits are unique and nonvolatile for each sector and have the same endurances as
the Flash memory. Preprogramming and verification prior to erasure are handled by the device, and therefore
do not require system monitoring.
Lock Register
DQ15-5
DQ4
DQ3
DQ2
DQ1
DQ0
1
s
DYB Lock Boot Bit
0 = DYB bits power up
protected (Default)
1 = DYB bits power up
unprotected
PPB One Time
Programmable Bit
0 = All PPB Erase
Command disabled
1 = All PPB Erase
Command enabled
Password
Protection
Mode Lock Bit
Persistent
Protection
Mode Lock Bit
Secured
Silicon Sector
Protection Bit