- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄385803 > S29NS128PABBJW003 (SPANSION LLC) MirrorBit Flash Family PDF資料下載
參數(shù)資料
| 型號(hào)： | S29NS128PABBJW003 |
| 廠(chǎng)商： | SPANSION LLC |
| 元件分類(lèi)： | DRAM |
| 英文描述： | MirrorBit Flash Family |
| 中文描述： | 8M X 16 FLASH 1.8V PROM, 80 ns, PBGA64 |
| 封裝： | 6.20 X 7.70 MM , LEAD FREE, TFBGA-64 |
| 文件頁(yè)數(shù)： | 77/86頁(yè) |
| 文件大?。?/td> | 2234K |
| 代理商： | S29NS128PABBJW003 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)當(dāng)前第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)
February 20, 2007 S29NS-P_00_A1
S29NS-P MirrorBit
TM
Flash Family
77
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
10.9
Erase and Programming Performance
Notes
1. Typical program and erase times assume the following conditions: 25
°
C, 1.8 V V
CC
, 10,000 cycles using checkerboard patterns.
2. Under worst case conditions of 90°C, V
CC
= 1.70 V, 100,000 cycles.
3. In the pre-programming step of the Embedded Erase algorithm, all words are programmed to 00h before erasure.
4. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See
Table 11.1,
Memory Array Commands on page 78
and
Table 11.2, Sector Protection Commands on page 80
for further information on command
definitions.
Table 10.11
Erase and Programming Performance
Parameter
Typ
(1)
Max
(2)
Unit
Comments
Sector Erase Time
64 Kword
V
CC
0.8
3.5
s
Excludes 00h
programming prior to
erasure
(3)
16 Kword
V
CC
0.15
2.0
64 Kword
V
PP
0.8
3.5
16 Kword
V
PP
0.15
2.0
Sector Erase Time
64 Kword
V
CC
0.90
5.00
Includes 00h
programming prior to
erasure
(3)
16 Kword
V
CC
0.45
1.85
64 Kword
V
PP
0.70
3.75
16 Kword
V
PP
0.35
1.40
Chip Erase Time
V
CC
77 (NS128P)
154 (NS256P)
306 (NS512P)
154 (NS128P)
308 (NS256P)
612 (NS512P)
s
Word Programming Time
V
CC
40
400
μs
Excludes system level
overhead
(4)
V
PP
24
240
Effective Word Programming Time
utilizing Program Write Buffer
V
CC
9.4
94
μs
V
PP
6
60
Total 32-Word Buffer Programming
Time
V
CC
300
3000
V
PP
192
1920
Chip Programming Time (using 32
word buffer)
V
CC
78.6 (NS128P)
157.3 (NS256P)
314.6 (NS512P)
157.3 (NS128P)
314.6 (NS256P)
629.2 (NS512P)
s
Excludes system level
overhead
(4)
V
PP
51 (NS128P)
101 (NS256P)
202 (NS512P)
102 (NS128P)
202 (NS256P)
404 (NS512P)
Erase Suspend/Erase Resume
Min
20
μs
Program Suspend/Program Resume
Min
20
μs
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S29NS256P | MirrorBit Flash Family |
| S29NS256P0PBJW000 | MirrorBit Flash Family |
| S29NS256P0PBJW003 | MirrorBit Flash Family |
| S29NS256P0SBJW000 | MirrorBit Flash Family |
| S29NS256P0SBJW003 | MirrorBit Flash Family |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29NS256N | 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:256/128/64 Megabit (16/8/4M x 16-bit), CMOS 1.8 Volt-only Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS256N0PBJW000 | 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS256N0PBJW002 | 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS256N0PBJW003 | 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS256N0SBJW000 | 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。