參數(shù)資料
型號(hào): S29NS128PABBJW000
廠商: SPANSION LLC
元件分類: DRAM
英文描述: MirrorBit Flash Family
中文描述: 8M X 16 FLASH 1.8V PROM, 80 ns, PBGA64
封裝: 6.20 X 7.70 MM , LEAD FREE, TFBGA-64
文件頁(yè)數(shù): 76/86頁(yè)
文件大?。?/td> 2234K
代理商: S29NS128PABBJW000
76
S29NS-P MirrorBit
TM
Flash Family
S29NS-P_00_A1 February 20, 2007
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
Figure 10.21
Back-to-Back Read/Write Cycle Timings
Note
Breakpoints in waveforms indicate that system may alternately read array data from the non-busy bank while checking the status of the
program or erase operation in the busy bank. The system should read status twice to ensure valid information.
OE#
CE#
WE#
t
OEH
A/DQ15–
A/DQ0
AVD#
PD/30h
AAh
RA
PA/SA
t
WC
t
DS
t
DH
t
RC
t
RC
t
OE
t
OEH
t
AS
t
AH
t
ACC
t
WP
t
GHWL
t
OEZ
t
WC
t
SR/W
Last Cycle in Program or
Sector Erase Command
Sequence
Read status (at least two cycles)
In same bank and/or array data
from other bank
Begin another
write or program
command sequence
RD
RA
555h
RD
Amax–
A16
PA/SA
t
WP
RA
RA
555h
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