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參數(shù)資料
| 型號： | S29NS-P |
| 廠商： | Spansion Inc. |
| 英文描述： | MirrorBit Flash Family |
| 中文描述： | MirrorBit閃存系列 |
| 文件頁數(shù)： | 73/86頁 |
| 文件大?。?/td> | 2234K |
| 代理商： | S29NS-P |
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February 20, 2007 S29NS-P_00_A1
S29NS-P MirrorBit
TM
Flash Family
73
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
Figure 10.14
Accelerated Unlock Bypass Programming Timing
Note
Use setup and hold times from conventional program operation.
Figure 10.15
Data# Polling Timings (During Embedded Algorithm)
Notes
1. Status reads in figure are shown as asynchronous.
2. VA = Valid Address. Two read cycles are required to determine status. When the Embedded Algorithm operation is complete, and Data#
Polling outputs true data.
Figure 10.16
Toggle Bit Timings (During Embedded Algorithm)
Notes
1. Status reads in figure are shown as asynchronous.
2. VA = Valid Address. Two read cycles are required to determine status. When the Embedded Algorithm operation is complete, the toggle
bits stop toggling.
CE#
AVD#
WE#
OE#
V
PP
Don't Care
Don't Care
A0h
PA
PA
PD
V
HH
1 μs
V
IL
or V
IH
t
VIDS
A/DQ15–
A/DQ0
Amax–
A16
WE#
CE#
OE
High Z
t
OE
High Z
AVD#
t
OEH
t
CE
t
CH
t
OEZ
Status Data
Status Data
t
ACC
VA
VA
VA
VA
A/DQ15–
A/DQ0
Amax–
A16
t
CEZ
WE#
CE#
OE
High Z
t
OE
High Z
AVD#
t
OEH
t
CE
t
CH
t
OEZ
t
CEZ
t
ACC
VA
VA
A/DQ15–
A/DQ0
Amax–
A16
Status Data
Status Data
VA
VA
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