
70
S29GL-P MirrorBit
 Flash Family
S29GL-P_00_A7 November 8, 2007
D a t a
S h e e t
( P r e l i m i n a r y )
Table 12.3  
S29GL-P Memory Array Command Definitions, x8
Command (Notes)
C
Bus Cycles (Notes 
1
–
5
)
First
Second
Third
Fourth
Fifth
Sixth
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read 
(6)
1
RA
RD
Reset 
(7)
1
XXX
F0
A
8
,
9
)
Manufacturer ID
4
AAA
AA
555
55
AAA
90
X00
01
Device ID 
(8)
4
AAA
AA
555
55
AAA
90
X02
XX7E
X1C
(8)
X1E
(8)
Sector Protect Verify 
(10)
4
AAA
AA
555
55
AAA
90
[SA]X04
(10)
Secure Device Verify 
(11)
4
AAA
AA
555
55
AAA
90
X06
(11)
CFI Query 
(12)
1
AA
98
Program 
 4
AAA
AA
555
55
AAA
A0
PA 
PD
Write to Buffer
3
AAA
AA
555
55
SA
25
SA
WC
WBL
PD
WBL
PD
Program Buffer to Flash (confirm)
1
SA
29
Write-to-Buffer-Abort Reset 
(13)
3
AAA
AA
555
55
555
F0
U
Enter
3
AAA
AA
555
55
AAA
20
 Program 
(14)
2
XXX
A0
PA
PD
Sector Erase 
(14)
2
XXX
80
SA
30
Chip Erase 
(14)
2
XXX
80
XXX
10
Reset 
(15)
2
XXX
90
XXX
00
Chip Erase
6
AAA
AA
555
55
AAA
80
AAA
AA
555
55
AAA
10
Sector Erase
6
AAA
AA
555
55
AAA
80
AAA
AA
555
55
SA
30
Erase Suspend/Program Suspend 
(16)
1
XXX
B0
Erase Resume/Program Resume 
(17)
1
XXX
30
Secured Silicon Sector Entry
3
AAA
AA
555
55
AAA
88
Secured Silicon Sector Exit 
(18)
4
AAA
AA
555
55
AAA
90
XX
00
Legend
X = Don’t care
RA = Address of the memory to be read.
RD = Data read from location RA during read operation. 
PA = Address of the memory location to be programmed. Addresses latch on 
the falling edge of the WE# or CE# pulse, whichever happens later. 
PD = Data to be programmed at location PA. Data latches on the rising edge 
of the WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or erased. 
Address bits A
max
–A16 uniquely select any sector.
WBL = Write Buffer Location. The address must be within the same write 
buffer page as PA.
WC = Word Count is the number of write buffer locations to load minus 1.
Notes
1. See 
Table 7.1 on page 19
 for description of bus operations.
2. All values are in hexadecimal.
3. All bus cycles are write cycles unless otherwise noted.
4. Data bits DQ15-DQ8 are don’t cares for unlock and command cycles.
5. Address bits A
MAX
:A16 are don’t cares for unlock and command cycles, 
unless SA or PA required. (A
MAX
 is the Highest Address pin.).
6. No unlock or command cycles required when reading array data.
7. The Reset command is required to return to reading array data when 
device is in the autoselect mode, or if DQ5 goes high (while the device is 
providing status data).
8. See 
Table 7.2 on page 22
 for device ID values and definitions.
9. The fourth, fifth, and sixth cycles of the autoselect command sequence are 
read cycles.
10.The data is 00h for an unprotected sector and 01h for a protected sector. 
See 
Autoselect  on page 21
 for more information. This is same as PPB 
Status Read except that the protect and unprotect statuses are inverted 
here.
11.The data value for DQ7 is “1” for a serialized, protected Secured Silicon 
Sector region and “0” for an unserialized, unprotected region. See 
Table 7.3 on page 22
 for data and definitions. 
12.Command is valid when device is ready to read array data or when device 
is in autoselect mode.
13.Command sequence returns device to reading array after being placed in 
a Write-to-Buffer-Abort state. Full command sequence is required if 
resetting out of abort while in Unlock Bypass mode.
14.The Unlock-Bypass command is required prior to the Unlock-Bypass-
Program command.
15.The Unlock-Bypass-Reset command is required to return to reading array 
data when the device is in the unlock bypass mode.
16.The system can read and program/program suspend in non-erasing 
sectors, or enter the autoselect mode, when in the Erase Suspend mode. 
The Erase Suspend command is valid only during a sector erase 
operation.
17.The Erase Resume/Program Resume command is valid only during the 
Erase Suspend/Program Suspend modes.
18.The Exit command returns the device to reading the array.