參數(shù)資料
型號(hào): S29GL032M10BCIR42
廠商: SPANSION LLC
元件分類: PROM
英文描述: MirrorBit Flash Family
中文描述: 2M X 16 FLASH 3V PROM, 100 ns, PBGA48
封裝: LEAD FREE, BGA-48
文件頁數(shù): 21/162頁
文件大?。?/td> 4557K
代理商: S29GL032M10BCIR42
March 30, 2004 S29GLxxxM_00A4
S29GLxxxM MirrorBitTM Flash Family
117
Pre l i m i n a r y
Figure 7. Data# Polling Algorithm
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output pin which indicates whether an
Embedded Algorithm is in progress or complete. The RY/BY# status is valid after
the rising edge of the final WE# pulse in the command sequence. Since RY/BY#
is an open-drain output, several RY/BY# pins can be tied together in parallel with
a pull-up resistor to VCC.
If the output is low (Busy), the device is actively erasing or programming. (This
includes programming in the Erase Suspend mode.) If the output is high (Ready),
the device is in the read mode, the standby mode, or in the erase-suspend-read
mode. Table 33 shows the outputs for RY/BY#.
DQ7 and DQ15
= Data?
Yes
No
DQ5 and DQ13
= 1?
No
Yes
FAIL
PASS
Read DQ15–DQ0
Addr = VA
Read DQ15–DQ0
Addr = VA
DQ7 and DQ15
= Data?
START
Notes:
1. VA = Valid address for programming. During a sector
erase operation, a valid address is any sector address
within the sector being erased. During chip erase, a
valid address is any non-protected sector address.
2. DQ7 should be rechecked even if DQ5 = “1” because
DQ7 may change simultaneously with DQ5.
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