
September 10, 2007 S29GL-A_00_A11
S29GL-A
87
D a t a
S h e e t
17. Erase And Programming Performance
Notes
1. Typical program and erase times assume the following conditions: 25
°
C, V
CC
= 3.0V, 10,000 cycles; checkerboard data pattern.
2. Under worst case conditions of 90
°
C; Worst case V
CC
, 100,000 cycles.
3. Effective programming time (typ) is 15
μ
s (per word), 7.5
μ
s (per byte).
4. Effective accelerated programming time (typ) is 12.5
μ
s (per word), 6.3
μ
s (per byte).
5. Effective write buffer specification is calculated on a per-word/per-byte basis for a 16-word/32-byte write buffer operation.
6. In the pre-programming step of the Embedded Erase algorithm, all bits are programmed to 00h before erasure.
7. System-level overhead is the time required to execute the command sequence(s) for the program command. See
Table 10.2 on page 61
and
Table 10.1 on page 62
for further information on command definitions.
Notes
1. Sampled, not 100% tested.
2. Test conditions T
A
= 25°C, f = 1.0 MHz.
Parameter
Typ
(Note 1)
Max
(Note 2)
Unit
Comments
Sector Erase Time
0.5
3.5
sec
Excludes 00h
programming prior
to erasure
(Note 6)
Chip Erase Time
S29GL016A
17.5
35
S29GL032A
32
64
S29GL064A
64
128
Total Write Buffer Program Time (Notes
3
,
5
)
240
μs
Excludes system
level overhead
(Note 7)
Total Accelerated Effective Write Buffer Program Time (Notes
4
,
5
)
200
Chip Program Time
S29GL016A
16
sec
S29GL032A
31.5
S29GL064A
63
Table 17.1
TSOP Pin and BGA Package Capacitance
Parameter Symbol
Parameter Description
Test Setup
Typ
Max
Unit
C
IN
Input Capacitance
V
IN
= 0
TSOP
6
7.5
pF
BGA
4.2
5.0
pF
C
OUT
Output Capacitance
V
OUT
= 0
TSOP
8.5
12
pF
BGA
5.4
6.5
pF
C
IN2
Control Pin Capacitance
V
IN
= 0
TSOP
7.5
9
pF
BGA
3.9
4.7
pF