參數(shù)資料
型號: S29CD032G0JFFN002
廠商: SPANSION LLC
元件分類: PROM
英文描述: 1M X 32 FLASH 2.7V PROM, 67 ns, PBGA80
封裝: 13 X 11 MM, 1 MM PITCH, LEAD FREE, FORTIFIED, BGA-80
文件頁數(shù): 55/81頁
文件大小: 1276K
代理商: S29CD032G0JFFN002
March 3, 2009 S29CD-G_00_B1
S29CD-G Flash Family
57
Da ta
Shee t
(Prelim i nar y )
However, if after the initial two immediately consecutive read cycles, the system determines that the toggle bit
is still toggling, the system also should note whether the value of DQ5 is high (See DQ5: Exceeded Timing
Limits on page 57). If it is, the system should then determine again whether the toggle bit is toggling, since
the toggle bit may have stopped toggling just as DQ5 went high. If the toggle bit is no longer toggling, the
device successfully completed the program or erase operation. If it is still toggling, the device did not
complete the operation successfully, and the system must write the reset command to return to reading array
data.
The remaining scenario is that the system initially determines that the toggle bit is toggling and DQ5 has not
gone high. The system may continue to monitor the toggle bit and DQ5 through successive read cycles,
determining the status as described in the previous paragraph. Alternatively, it may choose to perform other
system tasks. In this case, the system must start at the beginning of the algorithm when it returns to
determine the status of the operation (top of Figure 16.2).
Figure 16.2 Toggle Bit Algorithm
Notes
1. Read toggle bit with two immediately consecutive reads to determine whether or not it is toggling.
2. Recheck toggle bit because it may stop toggling as DQ5 changes to 1.
16.6
DQ5: Exceeded Timing Limits
DQ5 indicates whether the program or erase time exceeded a specified internal pulse count limit. Under
these conditions DQ5 produces a 1. This is a failure condition that indicates the program or erase cycle was
not successfully completed.
The DQ5 failure condition may appear if the system tries to program a 1 to a location that is previously
programmed to 0. Only an erase operation can change a 0 back to a 1. Under this condition, the device
halts the operation, and when the operation exceeds the timing limits, DQ5 produces a 1.
START
No
Yes
DQ5 = 1?
No
Yes
DQ6 = Toggle?
No
Read Byte
(DQ0-DQ7)
Address = VA
DQ6 = Toggle?
Read Byte Twice
(DQ 0-DQ7)
Adrdess = VA
Read Byte
(DQ0-DQ7)
Address = VA
FAIL
PASS
(Note 1)
(Notes 1, 2)
相關PDF資料
PDF描述
S29CD032G0RFFN003 1M X 32 FLASH 2.7V PROM, 48 ns, PBGA80
S29CD032G0RQFI012 1M X 32 FLASH 2.7V PROM, 48 ns, PQFP80
S29CL032J0JFAM020 1M X 32 FLASH 3.3V PROM, 54 ns, PBGA80
S29CL032J0JFFM020 1M X 32 FLASH 3.3V PROM, 54 ns, PBGA80
S29CL032J0RFAM012 1M X 32 FLASH 3.3V PROM, 48 ns, PBGA80
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