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4
S29AL016D
S29AL016D_00_A2 December 17, 2004
P r e l i m i n a r y
Table of Contents
General Description . . . . . . . . . . . . . . . . . . . . . . . . 2
Product Selector Guide. . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 6
Special Handling Instructions ...............................................................7
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9
S29AL016D Standard Products ...........................................................9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 10
Table 1. S29AL016D Device Bus Operations .........................10
Word/Byte Configuration ...................................................................10
Requirements for Reading Array Data ............................................11
Writing Commands/Command Sequences ....................................11
Program and Erase Operation Status ...............................................11
Standby Mode .........................................................................................12
Automatic Sleep Mode .........................................................................12
RESET#: Hardware Reset Pin ............................................................12
Output Disable Mode ...........................................................................13
Table 2. Sector Address Tables (Top Boot Device) .................13
Table 3. Sector Address Tables (Bottom Boot Device) ............14
Autoselect Mode ...................................................................................14
Table 4. S29AL016D Autoselect Codes (High Voltage Method) .15
Sector Protection/Unprotection .......................................................15
Temporary Sector Unprotect ...........................................................15
Figure 1. Temporary Sector Unprotect Operation................... 16
Figure 2. In-System Sector Protect/Unprotect Algorithms ....... 17
Common Flash Memory Interface (CFI). . . . . . . 18
Table 5. CFI Query Identification String ...............................18
Table 6. System Interface String .........................................19
Table 7. Device Geometry Definition ....................................19
Table 8. Primary Vendor-Specific Extended Query .................20
Hardware Data Protection ................................................................20
Low V
CC
Write Inhibit .......................................................................20
Write Pulse “Glitch” Protection ......................................................20
Logical Inhibit ..........................................................................................21
Power-Up Write Inhibit ......................................................................21
Command Definitions. . . . . . . . . . . . . . . . . . . . . . 22
Reading Array Data .............................................................................22
Reset Command ...................................................................................22
Autoselect Command Sequence ......................................................23
Word/Byte Program Command Sequence ...................................23
Unlock Bypass Command Sequence ...............................................24
Figure 3. Program Operation .............................................. 24
Chip Erase Command Sequence ......................................................25
Sector Erase Command Sequence ..................................................25
Erase Suspend/Erase Resume Commands ....................................26
Figure 4. Erase Operation .................................................. 27
Command Definitions .........................................................................28
Table 9. S29AL016D Command Definitions ...........................28
Write Operation Status . . . . . . . . . . . . . . . . . . . . 29
DQ7: Data# Polling ..............................................................................29
Figure 5. Data# Polling Algorithm ....................................... 30
RY/BY#: Ready/Busy# .........................................................................30
DQ6: Toggle Bit I ...................................................................................31
DQ2: Toggle Bit II ................................................................................32
Reading Toggle Bits DQ6/DQ2 ........................................................32
Figure 6. Toggle Bit Algorithm ............................................ 33
DQ5: Exceeded Timing Limits ...........................................................33
DQ3: Sector Erase Timer ..................................................................34
Table 10. Write Operation Status ....................................... 34
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . 35
Figure 7. Maximum Negative Overshoot Waveform................ 35
Figure 8. Maximum Positive Overshoot Waveform ................. 35
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . .36
Industrial (I) Devices ............................................................................36
V
CC
Supply Voltages ............................................................................36
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 37
CMOS Compatible ................................................................................37
Zero Power Flash .................................................................................38
Figure 9. I
CC1
Current vs. Time (Showing Active and
Automatic Sleep Currents) ................................................. 38
Figure 10. Typical I
CC1
vs. Frequency .................................. 38
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 11. Test Setup........................................................ 39
Table 11. Test Specifications ............................................. 39
Key to Switching Waveforms ...........................................................40
Figure 12. Input Waveforms and Measurement Levels............ 40
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 41
Read Operations ....................................................................................41
Figure 13. Read Operations Timings .................................... 41
Hardware Reset (RESET#) ................................................................42
Figure 14. RESET# Timings ................................................ 42
Word/Byte Configuration (BYTE#) ................................................43
Figure 15. BYTE# Timings for Read Operations ..................... 43
Figure 16. BYTE# Timings for Write Operations..................... 44
Erase/Program Operations ................................................................45
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 17. Program Operation Timings ................................. 46
Figure 18. Chip/Sector Erase Operation Timings.................... 47
Figure 19. Data# Polling Timings (During Embedded
Algorithms) ...................................................................... 48
Figure 20. Toggle Bit Timings (During Embedded Algorithms) . 48
Figure 21. DQ2 vs. DQ6 for Erase and Erase Suspend
Operations....................................................................... 49
Temporary Sector Unprotect ..........................................................49
Figure 22. Temporary Sector Unprotect/Timing Diagram ........ 49
Figure 23. Sector Protect/Unprotect Timing Diagram.............. 50
Alternate CE# Controlled Erase/Program Operations .............51
Figure 24. Alternate CE# Controlled Write Operation Timings.. 52
Erase and Programming Performance . . . . . . . . 53
TSOP and BGA Pin Capacitance . . . . . . . . . . . . .53
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . 54
TS 048—48-Pin Standard TSOP ......................................................54
VBK048—48-Ball Fine-Pitch Ball Grid Array (FBGA)
8.15 mm x 6.15 mm ................................................................................56
SO044—44-Pin Small Outline Package (SOP)
28.20 mm x 13.30 mm . . . . . . . . . . . . . . . . . . . . . . .57
Revision Summary. . . . . . . . . . . . . . . . . . . . . . . . . 58
Revision A (May 4, 2004) ...................................................................58
Revision A1 (July 28, 2004) .................................................................58
Revision A2 (December 17, 2004) ...................................................58