參數(shù)資料
型號(hào)： S29AL016D70MAI020
廠商： SPANSION LLC
元件分類： DRAM
英文描述： 16 MEGABIT CMOS 3.0 VOLT ONLY BOOT SECTOR FLASH MEMORY
中文描述： 1M X 16 FLASH 3V PROM, 70 ns, PDSO44
封裝： 28.20 X 13.30 MM, MO-180AAA, SOP-44
文件頁(yè)數(shù)： 31/58頁(yè)
文件大?。?/td> 1037K
代理商： S29AL016D70MAI020
December 17, 2004 S29AL016D_00_A2
S29AL016D
31
P r e l i m i n a r y
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output pin that indicates whether an Em-
bedded Algorithm is in progress or complete. The RY/BY# status is valid after the
rising edge of the final WE# pulse in the command sequence. Since RY/BY# is an
open-drain output, several RY/BY# pins can be tied together in parallel with a
pull-up resistor to V
CC
.
If the output is low (Busy), the device is actively erasing or programming. (This
includes programming in the Erase Suspend mode.) If the output is high (Ready),
the device is ready to read array data (including during the Erase Suspend
mode), or is in the standby mode.
Table 10
shows the outputs for RY/BY#. Figures
13
,
14
,
17
and
18
shows RY/BY#
for read, reset, program, and erase operations, respectively.
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm
is in progress or complete, or whether the device has entered the Erase Suspend
mode. Toggle Bit I may be read at any address, and is valid after the rising edge
of the final WE# pulse in the command sequence (prior to the program or erase
operation), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cy-
cles to any address cause DQ6 to toggle. (The system may use either OE# or CE#
to control the read cycles.) When the operation is complete, DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing
are protected, DQ6 toggles for approximately 100 μs, then returns to reading
array data. If not all selected sectors are protected, the Embedded Erase algo-
rithm erases the unprotected sectors, and ignores the selected sectors that are
protected.
The system can use DQ6 and DQ2 together to determine whether a sector is ac-
tively erasing or is erase-suspended. When the device is actively erasing (that is,
the Embedded Erase algorithm is in progress), DQ6 toggles. When the device en-
ters the Erase Suspend mode, DQ6 stops toggling. However, the system must
also use DQ2 to determine which sectors are erasing or erase-suspended. Alter-
natively, the system can use DQ7 (see the subsection on
DQ7: Data# Polling
).
If a program address falls within a protected sector, DQ6 toggles for approxi-
mately 1 μs after the program command sequence is written, then returns to
reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling
once the Embedded Program algorithm is complete.
Table 10
shows the outputs for Toggle Bit I on DQ6.
Figure 6
shows the toggle bit
algorithm in flowchart form, and the section
Reading Toggle Bits DQ6/DQ2
ex-
plains the algorithm.
Figure 20
in the
AC Characteristics
section shows the toggle
bit timing diagrams.
Figure 21
shows the differences between DQ2 and DQ6 in
graphical form. See also the subsection on
DQ2: Toggle Bit II
.
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