參數(shù)資料
型號(hào): S29AL016D70BFI020
廠商: SPANSION LLC
元件分類: DRAM
英文描述: 16 MEGABIT CMOS 3.0 VOLT ONLY BOOT SECTOR FLASH MEMORY
中文描述: 1M X 16 FLASH 3V PROM, 70 ns, PBGA48
封裝: 8.15 X 6.15 MM, LEAD FREE, FBGA-48
文件頁(yè)數(shù): 24/58頁(yè)
文件大?。?/td> 1037K
代理商: S29AL016D70BFI020
24
S29AL016D
S29AL016D_00_A2 December 17, 2004
P r e l i m i n a r y
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to program bytes or words to the
device faster than using the standard program command sequence. The unlock
bypass command sequence is initiated by first writing two unlock cycles. This is
followed by a third write cycle containing the unlock bypass command, 20h. The
device then enters the unlock bypass mode. A two-cycle unlock bypass program
command sequence is all that is required to program in this mode. The first cycle
in this sequence contains the unlock bypass program command, A0h; the second
cycle contains the program address and data. Additional data is programmed in
the same manner. This mode dispenses with the initial two unlock cycles required
in the standard program command sequence, resulting in faster total program-
ming time.
Table 9
shows the requirements for the command sequence.
During the unlock bypass mode, only the Unlock Bypass Program and Unlock By-
pass Reset commands are valid. To exit the unlock bypass mode, the system
must issue the two-cycle unlock bypass reset command sequence. The first cycle
must contain the data 90h; the second cycle the data 00h. Addresses are don’t
care for both cycles. The device then returns to reading array data.
Figure 3
illustrates the algorithm for the program operation. See the
Erase/Pro-
gram Operations
table in
AC Characteristics
for parameters, and to
Figure 17
for
timing diagrams.
NOTE: See
Table 9
for program command sequence.
Figure 3. Program Operation
START
Write Program
Command Sequence
Data Poll
from System
Verify Data
No
Yes
Last Address
No
Yes
Programming
Completed
Increment Address
Embedded
Program
algorithm
in progress
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