參數(shù)資料
型號(hào)： S25FL002D0FNFI011
廠商： SPANSION LLC
元件分類： DRAM
英文描述： 2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface
中文描述： 2M X 1 SPI BUS SERIAL EEPROM, PDSO8
封裝： 6 X 5 MM, LEAD FREE, WSON-8
文件頁(yè)數(shù)： 26/38頁(yè)
文件大?。?/td> 892K
代理商： S25FL002D0FNFI011
26
S25FL Family (Serial Peripheral Interface)
30167A+1 June 9, 2004
P r e l i m i n a r y I n f o r m a t i o n
Power-up and Power-down
The device must not be selected at power-up or power-down (that is, CS# must
follow the voltage applied on V
CC
) until V
CC
reaches the minimum correct value,
as follows:
V
CC
(min) at power-up, and then for a further delay of t
PU
(as described in
Table
7
)
V
SS
at power-down
A simple pull-up resistor on Chip Select (CS#) can usually be used to insure safe
and proper power-up and power-down. To avoid data corruption and inadvertent
write operations during power up, a Power On Reset (POR) circuit is included. The
logic inside the device is held reset while V
CC
is less than the POR threshold value
(V
POR
). All operations are disabled, and the device does not respond to any
instructions.
The device ignores all instructions until a time delay of t
PU
(as described in Table
7
) has elapsed after the moment that V
CC
rises above the minimum V
CC
thresh-
old. However, correct operation of the device is not guaranteed if by this time V
CC
is still below V
CC
(min). No Read, Write Status Register, Program or Erase instruc-
tions should be sent until t
PU
after V
CC
reaches the minimum V
CC
threshold.
At power-up, the device is in Standby mode (not Software Protect mode) and the
WEL bit is reset.
Normal precautions must be taken for supply rail decoupling to stabilize the V
CC
feed. Each device in a system should have the V
CC
rail decoupled by a suitable
capacitor close to the package pins (this capacitor is generally of the order of 0.1
μF).
At power-down, when V
CC
drops from the operating voltage to below the mini-
mum V
CC
threshold, all operations are disabled and the device does not respond
to any instructions. (The designer needs to be aware that if a power-down occurs
while a Write, Program or Erase cycle is in progress, data corruption can result.)
Figure 17. Power-Up Timing
VCC
VCC (max)
VCC (min)
*Note:
Program, Erase, and Write Commands are not allowed and are not recommended during this period,
as the state of the device operation is unknown during tPU.
Device fully
accessible
time
tPU
VPOR
Reset State of the Device
*Note
相關(guān)PDF資料
PDF描述
S25FL002D0FNFI013 2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface
S25FL001D0FMAI013 2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface
S25FL001D0FMFI001 INDUCTOR,STANDARD WOUND,0806,22UH 10% ,T&R RoHS Compliant: Yes
S25FL001D0FMFI003 2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface
S25FL001D0FMFI011 2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S25FL002D0FNFI013 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface
S25FL004A 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
S25FL004A0LMFI001 制造商:Spansion 功能描述:Flash Mem Serial-SPI 3V/3.3V 4M-Bit 512K x 8 10ns 8-Pin SOIC W Tube
S25FL004A0LMFI003 制造商:Spansion 功能描述:Flash Mem Serial-SPI 3V/3.3V 4M-Bit 512K x 8 10ns 8-Pin SOIC W T/R
S25FL004AOLMAI000 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*