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參數(shù)資料
| 型號： | S1L53353 |
| 廠商： | 愛普生（中國）有限公司 |
| 英文描述： | HIGH DENSITY GATE ARRAY |
| 中文描述： | 高密度門陣列 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 105K |
| 代理商： | S1L53353 |
7
DATA SHEET
EPSON ELECTRONICS AMERICA, INC.
i
150 River Oaks Pkwy
i
San Jose, CA 95134
i
Tel: (408) 922-0200
i
Fax: (408) 922-0238
ASIC
S1L50000
Electrical Characteristics of the
S1L50000
Series:
(V
DD
= 3.3V
±
0.3V, V
SS
= 0V, T
a
= -40 to 85
°
C)
Item
Symbol
I
DDS
I
LI
I
OZ
V
OH
Conditions
Min
--
-1
-1
V
DD
-0.4
Typ
--
--
--
--
Max
170
1
1
--
Unit
μ
A
μ
A
μ
A
V
Quiescent Current
*
Input Leakage Current
Off State Leakage Current
High Level Output Voltage
Quiescent Conditions
--
--
I
OH
= -0.1mA (Type S), -1mA (Type
M), -2mA (Type 1), -6mA (Type 2),
-12mA (Type 3, Type 4)
V
DD
= Min
I
OL
= 0.1mA (Type S), 1mA (Type
M), 2mA (Type 1), 6mA (Type 2),
12mA (Type 3), 24mA (Type 4)
V
DD
= Min
LVTTL Level, V
DD
= Max
LVTTL Level, V
DD
= Min
LVTTL Schmitt
LVTTL Schmitt
LVTTL Schmitt
PCI Level, V
DD
= Max
PCI Level, V
DD
= Min
PCI Response,
V
OH
= 0.90V, V
DD
= Min
V
OH
= 2.52V, V
DD
= Max
PCI Response
V
OH
= 1.80V, V
DD
= Min
V
OL
= 2.52V, V
DD
= Max
V
I
= 0V
Low Level Output Voltage
V
OL
--
--
0.4
V
High Level Input Voltage
Low Level Input Voltage
High Level Input Voltage
Low Level Input Voltage
Hysteresis Voltage
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
V
IH1
V
IL1
V
T1+
V
T1-
V
H1
V
IH3
V
IL3
I
OH3
2.0
--
1.1
0.6
0.1
1.71
--
--
--
--
--
--
--
--
--
0.8
2.4
1.8
--
--
0.98
V
V
V
V
V
V
V
-36
--
--
--
--
-115
mA
mA
Low Level Output Current
I
OL3
48
--
20
--
--
50
--
137
(100)
120
(200)
240
(100)
120
(200)
240
-20
mA
mA
Type 1
Pull-up Resistance**
R
PU
Type 2
40
100
K
Type 1
20
50
Pull-down Resistance**
R
PD
V
I
= V
DD
Type 2
40
100
K
High Level Maintenance
Current
Low Level Maintenance
Current
High Level Reversal Current
I
BHH
Bus Hold Response,
V
IN
= 2.0V, V
DD
= Min
Bus Hold Response,
V
IN
= 0.8V, V
DD
= Min
Bus Hold Response,
V
IN
= 0.8V, V
DD
= Max
Bus Hold Response,
V
IN
= 2.0V, V
DD
= Max
f = 1Mhz, V
DD
= 0V
f = 1Mhz, V
DD
= 0V
f = 1Mhz, V
DD
= 0V
--
--
μ
A
I
BHL
--
--
17
μ
A
I
BHHO
-350
--
--
μ
A
Low Level Reversal Current
I
BHLO
210
--
--
μ
A
Input Terminal Capacitance
Output Terminal Capacitance
Input/Output Terminal
Capacitance
The quiescent current is a typical value (T
j
=85
°
C) for each master.
The values in parentheses are for the case of T
a
= 0 to 70
°
C.
C
I
C
O
C
IO
--
--
--
--
--
--
10
10
10
pF
pF
pF
*
**
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