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  • 參數(shù)資料
    型號: S1D13706F00A
    元件分類: 顯示控制器
    英文描述: 320 X 240 PIXELS CRT OR FLAT PNL GRPH DSPL CTLR, PQFP100
    封裝: TQFP-100
    文件頁數(shù): 20/171頁
    文件大小: 4940K
    代理商: S1D13706F00A
    Epson Research and Development
    Page 21
    Vancouver Design Center
    Hardware Functional Specification
    S1D13706
    Issue Date: 01/02/23
    X31B-A-001-06
    DB[15:0]
    IO
    18-24,
    27-35
    LB2A
    HIOVDD
    Hi-Z
    Input data from the system data bus.
    For Generic #1, these pins are connected to D[15:0].
    For Generic #2, these pins are connected to D[15:0].
    For SH-3/SH-4, these pins are connected to D[15:0].
    For MC68K #1, these pins are connected to D[15:0].
    For MC68K #2, these pins are connected to D[31:16] for a 32-
    bit device (e.g. MC68030) or D[15:0] for a 16-bit device (e.g.
    MC68340).
    For REDCAP2, these pins are connected to D[15:0].
    For DragonBall, these pins are connected to D[15:0].
    summary.
    WE0#
    I
    10
    LIS
    HIOVDD
    1
    This input pin has multiple functions.
    For Generic #1, this pin inputs the write enable signal for the
    lower data byte (WE0#).
    For Generic #2, this pin inputs the write enable signal (WE#)
    For SH-3/SH-4, this pin inputs the write enable signal for data
    byte 0 (WE0#).
    For MC68K #1, this pin must be tied to IO VDD
    For MC68K #2, this pin inputs the bus size bit 0 (SIZ0).
    For REDCAP2, this pin inputs the byte enable signal for the
    D[7:0] data byte (EB1).
    For DragonBall, this pin inputs the byte enable signal for the
    D[7:0] data byte (LWE).
    summary.
    WE1#
    I
    11
    LIS
    HIOVDD
    1
    This input pin has multiple functions.
    For Generic #1, this pin inputs the write enable signal for the
    upper data byte (WE1#).
    For Generic #2, this pin inputs the byte enable signal for the
    high data byte (BHE#).
    For SH-3/SH-4, this pin inputs the write enable signal for data
    byte 1 (WE1#).
    For MC68K #1, this pin inputs the upper data strobe (UDS#).
    For MC68K #2, this pin inputs the data strobe (DS#).
    For REDCAP2, this pin inputs the byte enable signal for the
    D[15:8] data byte (EB0).
    For DragonBall, this pin inputs the byte enable signal for the
    D[15:8] data byte (UWE).
    summary.
    CS#
    I
    6
    LI
    HIOVDD
    1
    on page 28 for summary.
    M/R#
    I
    7
    LIS
    HIOVDD
    0
    This input pin is used to select between the display buffer and
    register address spaces of the S1D13706. M/R# is set high to
    access the display buffer and low to access the registers. See
    summary.
    Table 4-2: Host Interface Pin Descriptions
    Pin Name
    Type
    Pin #
    Cell
    IO
    Voltage
    RESET#
    State
    Description
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