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參數(shù)資料
| 型號(hào)： | S1C6S2L7D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 0.032 MHz, MICROCONTROLLER, UUC58 |
| 封裝： | 3.39 X 3.13 MM, DIE-58 |
| 文件頁(yè)數(shù)： | 159/192頁(yè) |
| 文件大小： | 1141K |
| 代理商： | S1C6S2L7D |
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S1C6S2N7 TECHNICAL HARDWARE
EPSON
I-57
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (SVD Circuit and Heavy Load Protection Function)
The following explains the timing when the SVD circuit
writes the result of supply voltage detection to the SVDDT
register.
The result of supply voltage detection is written to the
SVDDT register by the SVD circuit, and this data can be
read by the software to determine the supply voltage.
There are two methods, explained below, for executing the
detection by the SVD circuit.
(1) Sampling with HLMOD set to 1
When HLMOD is set to 1 and SVD sampling is executed,
the detection results can be written to the SVDDT register
with the following timing:
Immediately after sampling with the 2 Hz cycle output by
the oscillation circuit while HLMOD = 1 (sampling time is
122 s in the case of fosc = 32.768 kHz).
Consequently, after HLMOD has been set to 1, the new
detection result is written in a 2 Hz.
(2) Sampling with SVDON set to 1
When SVDON is set to 1, SVD detection is executed. As
soon as SVDON is reset to 0, the result is loaded to in the
SVDDT register. To obtain a stable SVD detection result,
the SVD circuit must be on for at least l00 s. So, to
obtain the SVD detection result, follow the programming
sequence below.
Set SVDON to 1
Maintain for 100 s minimum
Set SVDON to 0
Read SVDDT
However, at 32 kHz for the S1C6S2N7, S1C6S2A7,
S1C6S2L7 and S1C6S2B7, the instruction cycles are long
enough, so there is no need to worry about maintaining
100 s for SVDON = 1 in the software.
Notice that even if the SVD circuit detects a drop in the
supply voltage (l.2 V/2.4 V or less) and invokes the heavy
load protection mode, this will be the same as when the
software invokes the heavy load protection mode, in that the
SVD circuit will be sampled with a timing synchronized to
the 2 Hz output from the prescaler. If the SVD circuit
detects a voltage drop and enters the heavy load protection
mode, it will return to the normal mode once the supply
voltage recovers and the SVD circuit determines that the
supply voltage is l.2 V/2.4 V or more.
Operation of SVD
detection timing
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| S1C6S2N7F0A0100 | MICROCONTROLLER, PQFP60 |
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