- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98068 > S1C63458F0A0100 MICROCONTROLLER, PQFP144 PDF資料下載
參數(shù)資料
| 型號(hào)： | S1C63458F0A0100 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, PQFP144 |
| 封裝： | QFP-144 |
| 文件頁(yè)數(shù)： | 140/144頁(yè) |
| 文件大?。?/td> | 1156K |
| 代理商： | S1C63458F0A0100 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)當(dāng)前第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)
S1C63458 TECHNICAL MANUAL
EPSON
85
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Serial Interface)
EISIF: Interrupt mask register (FFE3HD0)
Masking the interrupt of the serial interface can be selected with this register.
When "1" is written: Enabled
When "0" is written: Masked
Reading: Valid
With this register, it is possible to select whether the serial interface interrupt is to be masked or not.
At initial reset, this register is set to "0".
ISIF: Interrupt factor flag (FFF3HD0)
This flag indicates the occurrence of serial interface interrupt.
When "1" is read: Interrupt has occurred
When "0" is read: Interrupt has not occurred
When "1" is written: Flag is reset
When "0" is written: Invalid
From the status of this flag, the software can decide whether the serial interface interrupt.
This flag is set to "1" after an 8-bit data input/output even if the interrupt is masked.
This flag is reset to "0" by writing "1" to it.
After an interrupt occurs, the same interrupt will occur again if the interrupt enabled state (I flag = "1") is
set or the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure to reset
(write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the interrupt
enabled state.
At initial reset, this flag is set to "0".
4.11.6 Programming notes
(1) Perform data writing/reading to the data registers SD0–SD7 only while the serial interface is not
running (i.e., the synchronous clock is neither being input or output).
(2) As a trigger condition, it is required that data writing or reading on data registers SD0–SD7 be
performed prior to writing "1" to SCTRG. (The internal circuit of the serial interface is initiated
through data writing/reading on data registers SD0–SD7.) In addition, be sure to enable the serial
interface with the ESIF register before setting the trigger.
Supply trigger only once every time the serial interface is placed in the RUN state. Refrain from
performing trigger input multiple times, as leads to malfunctioning. Moreover, when the synchronous
clock SCLK is external clock, start to input the external clock after the trigger.
(3) Setting of the input/output permutation (MSB first/LSB first) with the SDP register should be done
before setting data to SD0–SD7.
(4) Be aware that the maximum clock frequency for the serial interface is limited to 1 MHz when OSC3 is
used as the clock source of the programmable timer or in the slave mode.
(5) After an interrupt occurs, the same interrupt will occur again if the interrupt enabled state (I flag =
"1") is set or the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure
to reset (write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the
interrupt enabled state.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S1C63466D | 4-BIT, MROM, 4.1 MHz, MICROCONTROLLER, UUC140 |
| S1C63466F | 4-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP144 |
| S1C63567F0A0100 | MICROCONTROLLER, PQFP144 |
| S1C63653F | 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, CQFP100 |
| S1C6F567D0A0100 | MICROCONTROLLER, UUC141 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S1C63557D04Q000 | 制造商:Seiko Instruments Inc (SII) 功能描述:EPSON MCU 4BIT |
| S1C63567 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63616 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63632 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63653 | 制造商:EPSON 制造商全稱:EPSON 功能描述:CMOS 4-bit Single Chip Microcontroller |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。