參數(shù)資料
型號: S1C63358F
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, QFP15-100
文件頁數(shù): 2/12頁
文件大?。?/td> 128K
代理商: S1C63358F
10
S1C63358
CA
CB
AVDD
AVREF
TEST
VDD
VD1
OSC1
OSC2
OSC3
OSC4
RESET
VSS
AVSS
C1
C2
CGX
CDC
CRES
CP
0.9 V
|
3.6 V
+
X'tal
CR
3
2
R
CR2
1
2
R
CR1
K00–K03
K10–K13
K20
P00–P03
P10 (SIN)
P11 (SOUT)
P12 (SCLK)
P13 (SRDY)
P20–P23
P30–P33
P40 (AD0)
P41 (AD1)
P42 (AD2)
P43 (AD3)
R00
R01
R02 (TOUT)
R03 (FOUT)
R10–R13
R20–R23
SEG0
|
SEG31
COM0
|
COM3
LCD panel 32
× 4
1: Crystal oscillation
2: CR oscillation
3: Ceramic oscillation
CGC
BZ
Input
I/O
Output
X'tal
CGX
RCR1
CR
CGC
CDC
RCR2
C1–C5
CP
CRES
Crystal oscillator
Trimmer capacitor
Resistor for OSC1 CR oscillation
Ceramic oscillator
Gate capacitor
Drain capacitor
Resistor for OSC3 CR oscillation
Capacitor
RESET terminal capacitor
32.768 kHz, CI (Max.) = 34 k
5–25 pF
600 k
(60 kHz)
4 MHz (3.0 V)
100 pF
47 k
(1.8 MHz)
0.2
F
3.3
F
0.1
F
S1C63358
[The potential of the substrate
(back of the chip) is VSS.]
V
C1
C2
C3
Piezo
Coil
C
3
C
4
C
5
q Timing Chart
System clock switching
VDC
OSCC
CLKCHG
(Note) When the OSC1 oscillation circuit has been selected as the CR oscillation circuit,
it is not necessary to set the VDC register.
Whether the VDC register value is "1" or "0" does not matter.
2.5 msec min.
5 msec min.
1 instruction execution time or longer
Supply voltage VC2 mode control during heavy load driving
LPWR
VDSEL
VADSEL (Note)
Heavy load
ON
OFF
(Note) VADSEL is used only when it is required.
100 msec min.
1 msec min.
2 sec min.
1 instruction execution time or longer
s BASIC EXTERNAL CONNECTION DIAGRAM
Note: The above table is simply an
example, and is not guaranteed
to work.
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