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參數(shù)資料
| 型號： | S1C60N02D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 0.08 MHz, MICROCONTROLLER, UUC52 |
| 封裝： | DIE-52 |
| 文件頁數(shù)： | 55/102頁 |
| 文件大?。?/td> | 674K |
| 代理商： | S1C60N02D |
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48
EPSON
S1C60N02 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (A/D Converter)
(3) Counter
The A/D converter incorporates two types of 16-bit
counters. One is the up-counter C0–C15 that counts the
aforementioned oscillation clock, and the other is up/
down counter TC0–TC15 that counts the internal clock
for reference counting. Each counter permits reading and
writing on a 4-bit basis.
The input unit of the up/down counter TC0–TC15 incor-
porates a multiplying circuit so that either the OSC1
clock (Typ. 32.768 kHz) or its multiplication clock (Typ.
65.536 kHz) can be selected as an input clock.
When A/D conversion is initiated by the ADRUN register,
oscillation by the reference resistance begins first, and
the up-counter C0–C15 starts counting up according to
the oscillation clock. At the same time, the up/down
counter TC0–TC15 starts counting up.
Timing in starting oscillation and starting counting up
are shown in Figure 4.8.3.
The up-counter becomes ENABLE at the falling edge of
the first clock after CR oscillation is initiated and starts
counting up from the falling edge of the next clock.
The up/down counter becomes ENABLE at the falling
edge of the internal clock which is input immediately
after the first CR oscillation clock has fallen. Then, it
starts counting up from the falling edge of the next inter-
nal clock.
Fig. 4.8.3
Counting up start
timing
ADRUN register
CS terminal
ADOUT
Up-counter enable
Up-counter (C0)
Clock (Up/down counter)
Up/down counter enable
Up/down counter (TC0)
Start
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PDF描述 |
|---|---|
| S1C60L02 | 4-BIT, MROM, 0.08 MHz, MICROCONTROLLER, PQFP60 |
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| S1C60N08D | 4-BIT, MROM, 0.032768 MHz, MICROCONTROLLER, UUC96 |
| S1C60N08F0A0100 | MICROCONTROLLER, PQFP100 |
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相關(guān)代理商/技術(shù)參數(shù) |
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| S1C60R08 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
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