
10 Input/Output Port (P)
10-32
EPSON
S1C17602 TECHNICAL MANUAL
10.9 Precautions
Operation clock
The PCLK clock must be fed from the clock generator to access the input/output port.
The prescaler output clock is also needed to operate the P0 and P1 port chattering filter. Switch on the
prescaler when using this function.
Pull-up
A delay will occur in the waveform rise-up depending on time constants such as pull-up resistance and pin
load capacitance if the port pin is switched from Low level to High level by the internal pull-up resistor. An
appropriate wait time must be set for the input/output port loading. The wait time set should be a value not
less than that calculated from the following equation.
Wait time = RIN x (CIN + load capacitance on board) x 1.6 [s]
RIN: pull-up resistance maximum value
CIN: pin capacitance maximum value
Input/output ports that are not used should be set with pull-up resistance enabled.
P0 and P1 port interrupts
Reset the corresponding interrupt flags P0IF[7:0] (0x5207) and P1IF[7:0] (0x5217) within the interrupt
processing routine following a port interrupt to prevent recurring interrupts.
To prevent generating unnecessary interrupts, reset the corresponding interrupt flag—P0IF[7:0] (0x5207) or
P1IF[7:0] (0x5217)—before permitting interrupts for the required port with the P0_IMSK register (0x5205)
or P1_IMSK register (0x5215).
P0/P1 Port chattering filter circuit
Input interrupts will not be accepted for a transition into SLEEP mode with the chattering filter left on. The
chattering filter should be set off (no verification time) before executing the slp instruction.
P0/P1 port interrupts must be blocked when Px_CHAT register (0x5208/0x5218) settings are being changed.
Changing the setting while interrupts are permitted may generate inadvertent P0/P1 interrupts.
The chattering filter verification time refers to the maximum pulse width that can be filtered. Generating an
input interrupt requires a minimum input time of the verification time and a maximum input time of twice the
verification time.
A phenomenon may occur in which the internal signal oscillates due to the time elapsed until the signal
reaches the threshold value if the input signal rise-up/drop-off time is delayed. Since input interrupts will
malfunction under these conditions, the input signal rise-up/drop-off time should normally be set to 25 ns or
less.
P0 port key-entry reset
Make sure the specified ports are not simultaneously switched to Low during normal operations when using
the P0 port key-entry reset function.
The P0 port key entry reset function is disabled on initial resetting and cannot be used for resetting at power-
on.
The P0 port key-entry reset function cannot be used in SLEEP state.