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參數(shù)資料
| 型號： | S1633E-FREQ1(T) |
| 廠商： | PERICOM SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 1.8432 MHz - 79.9999 MHz, CMOS/LSTTL OUTPUT |
| 封裝： | ROHS COMPLIANT, CERAMIC PACKAGE-4 |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 552K |
| 代理商： | S1633E-FREQ1(T) |
3.3V CMOS Low Jitter XO
FD Series Crystal Clock Oscillator (XO)
Legacy S1633 Series
5.0 x 3.2mm
SaRonix-eCera is a Pericom Semiconductor Corporation company 1-800-435-2336 www.pericom.com/saronix
FD
All specifications are subject to change without notice. DS 246 Rev B | 07/05/07
2
Electrical Performance
Parameter
Output frequency
Supply voltage
Min.
1.8432
+3.135
Typ.
Max.
125
+3.465
15
12
25
40
55
10
±25 to ±50
+85
10% V
DD
Units
MHz
V
Notes
As speci
fi
ed
+3.3
Supply current, output enabled
mA
1.8432 to <40 MHz
40 to 50 MHz
>50 to <60 MHz
60 to <80 MHz
80 to 125 MHz
Output Hi-Z
See Note 1 below
As speci
fi
ed
mA
μ
A
ppM
°C
V
V
Supply current, standby mode
Frequency stability
Operating temperature
Output logic 0, VOL
Output logic 1, VOH
Output load
Duty cycle (1.8432 to 79.9999 MHz)
-40
90% V
DD
15 pF (max) or 10 LSTTL
45
55
%
-40 to +85°C measured 50%VDD
Duty cycle (80 to 125 MHz)
45
55
%
-20 to +70°C measured 50%VDD
Duty cycle (80 to 125 MHz)
40
60
7
5
3
1.5
1
5
3
50
30
%
-40 to +85°C measured 50%VDD
Rise and fall
time
<40 MHz
40 to <80 MHz
80 to 125 MHz
up to <80 MHz
80 to 125 MHz
up to <80 MHz
80 to 125 MHz
up to <80 MHz
80 to 125 MHz
ns
measured 20/80% of waveform
Jitter,
Phase
ps RMS
(1-
σ
)
10kHz to 20 MHz frequency band
Jitter,
Accumulated
ps RMS
(1-
σ
)
20.000 adjacent periods
Jitter,
Total
ps
pk-pk
100.000 random periods
Notes:
1.
As speci
fi
ed. Stability includes all combinations of operating temperature, load changes, rated input (supply) voltage changes, initial calibration tolerance (25°C),
aging (1 year at 25°C average effective ambient temperature), shock and vibration.
2. For speci
fi
cations other than those listed, please contact sales.
Output Enable / Disable Function
Parameter
Input Voltage (pin 1), Output Enable
Input voltage (pin 1), Output Disable (low power standby)
Internal pullup resistance
Output disable delay
Output enable delay
Min.
2.2
Typ.
Max.
Units
V
V
k
Ω
ns
ms
Notes
or open
Output is Hi-Z
0.8
50
100
10
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