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參數(shù)資料
| 型號(hào)： | S1500ECAL-FREQ1-OUT23 |
| 元件分類： | XO, clock |
| 英文描述： | VCXO, CLOCK, 1.5 MHz - 28.6363 MHz, CMOS OUTPUT |
| 封裝： | FULL SIZE, RESISTANCE WELDED, METAL, DIP-4 |
| 文件頁(yè)數(shù)： | 2/2頁(yè) |
| 文件大?。?/td> | 125K |
| 代理商： | S1500ECAL-FREQ1-OUT23 |
S1500 / S1509 Series
SaRonix
Voltage Controlled Crystal Oscillator
Technical Data
5V, HCMOS
DS-197 REV D
5.4
All specifications are subject to change without notice.
Stability Tolerance
AA = ±20ppm, 0 to +70°C
A = ±25ppm, 0 to +70°C
B = ±50ppm, 0 to +70°C
E = ±50ppm, -40 to +85°C
Package Details
Part Numbering Guide
5.08
.46±.08
.018±.003
0.91
7.62±.20
.300±.008
7.62±.20
.300±.008
Pin 5
Output
Pin 8
V
DD
Pin 1
Control
Voltage
Pin 4
GND Case (V
SS
)
Scale: None (Dimensions in inches
SARONIX
Denotes Pin 1
HALF SIZE PACKAGE
SARONIX
VCXO
Denotes Pin 1
Pin 3
Pin 1
Pin 7
7.75
.305
Pin 12
Pin 14
15.24±.13
.600±.005
5.08
6.35±0.51
0.25±0.02
3.94±.25
.155±.010
.46±.08
.018±.003
0.2" HIGH, FULL SIZE PACKAGE
21.0
0.91
max
13.0
.510
max
Tri-State Logic Table
(4) Glass Insulators
Pin 8
Pin Function:
Pin 8: OUTPUT
Pin 12: N/C (optional)
Pin 14: +5 VDC (V
DD
)
Pin 1: Control Voltage
Pin 3: Tri-State control (optional)
Pin 7: GND/Case (V
SS
)
Marking Format
**
Includes Date Code, Frequency & Model
13.0
6.35±0.51
0.25±0.02
13.0
.510
max
Frequency (MHz)
SaRonix
Blank
= Non Tri-State
T
= Tri-State
Supply Voltage
150 = 5V
S T 150 9 A A A K - 19.4400
Lead/Package Types
*
Blank = full 0.3"(not shown) / half 0.2" high
L = full 0.2" high
J = gull wing: full / half 0.2" high(not shown)
K = gull wing: full 0.3" high(not shown)
Linearity
A = 5%
B = 10%
Pullability
(min APR)
**
A = ±50ppm
*
B = ±100ppm
*
C = ±200ppm
*
(available at certain frequencies
only, please contact SaRonix)
Pin 3(2) Input
Logic 1 or NC
Logic 0 or GND
Pin 8(5) Output
Oscillation
High Impedance
Required Input Levels on Pin 3(2):
Logic 1 = 3.0 V
DD
min
Logic 0 = 0.5 V
DD
max
mA
M
POWER
SUPPLY
V M
OSCILLATOR
V
DD
OUT
GND
Pin 14(8)
Pin 8(5)
Pin 1(1)
*
Pin 7(4)
Pin 3(2)
TEST
POINT
OPTIONAL
TRI-STATE
CONTROL
VOLTAGE
NOTE A: C
L
includes probe and fixture capacitance
*
Items in brackets( ) represent Half Size model
C
L
(Note A) = 30pF
(15pF > 70 MHz)
Test Circuit
max
Marking Format
**
Includes Date Code, Frequency & Model
**
Exact location of items may vary
2.54
.100
Pin 2
Optional
Tri-State Control
SaRonix
141 Jefferson Drive Menlo Park, CA 94025 USA 650-470-7700 800-227-8974 Fax 650-462-9894
Package Size
0 = Full Size
9 = 1/2 Size (28.6363 MHz max)
**
APR = (VCXO Pull relative to specified Output Frequency)
–
(VCXO Frequency Stability)
–
(Aging)
aging is inclusive on the 1/2 size version
Frequency
1.5 to 28.6363MHz
Pullability
A, B
C
A, B, C
Package/Lead Types
L, J
Blank(0.3" full size), K
Blank(0.3" full size), K
28.6363+ to 100MHz
*
Products are available with the following combination of Frequency, Pull and Package
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST1500AAAAK-FREQ3-OUT23 | VCXO, CLOCK, 70 MHz - 100 MHz, CMOS OUTPUT |
| ST1509EAAJ-FREQ-OUT23 | VCXO, CLOCK, 1.5 MHz - 28.6363 MHz, CMOS OUTPUT |
| ST1500BAAJ-FREQ1-OUT23 | VCXO, CLOCK, 1.5 MHz - 28.6363 MHz, CMOS OUTPUT |
| ST1500BAAK-FREQ1-OUT23 | VCXO, CLOCK, 1.5 MHz - 28.6363 MHz, CMOS OUTPUT |
| ST1500BBBK-FREQ3-OUT23 | VCXO, CLOCK, 70 MHz - 100 MHz, CMOS OUTPUT |
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參數(shù)描述 |
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