參數(shù)資料
型號(hào)： S12BKPV1
廠商： Motorola, Inc.
英文描述： MC9S12DT128 Device User Guide V02.09
中文描述： MC9S12DT128設(shè)備的用戶手冊(cè)V02.09
文件頁數(shù)： 25/138頁
文件大?。?/td> 2083K
代理商： S12BKPV1
MC9S12DT128 Device User Guide — V02.09
25
Section 1 Introduction
1.1 Overview
The MC9S12DT128 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip
peripherals including a 16-bit central processing unit (HCS12 CPU), 128K bytes of Flash EEPROM, 8K
bytes of RAM, 2K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), two
serial peripheral interfaces (SPI), an 8-channel IC/OC enhanced capture timer, two 8-channel, 10-bit
analog-to-digitalconverters(ADC),an8-channelpulse-widthmodulator(PWM),adigitalByteDataLink
Controller (BDLC), 29 discrete digital I/O channels (Port A, Port B, Port K and Port E), 20 discrete digital
I/O lines with interrupt and wakeup capability, three CAN 2.0 A, B software compatible modules
(MSCAN12), a Byteflight module and an Inter-IC Bus. The MC9S12DT128 has full 16-bit data paths
throughout. However, the external bus can operate in an 8-bit narrow mode so single 8-bit wide memory
can be interfaced for lower cost systems. The inclusion of a PLL circuit allows power consumption and
performance to be adjusted to suit operational requirements.
1.2 Features
HCS12 Core
–
16-bit HCS12 CPU
i. Upward compatible with M68HC11 instruction set
ii. Interrupt stacking and programmer’s model identical to M68HC11
iii.20-bit ALU
iv.Instruction queue
v. Enhanced indexed addressing
–
MEBI (Multiplexed External Bus Interface)
–
MMC (Module Mapping Control)
–
INT (Interrupt control)
–
BKP (Breakpoints)
–
BDM (Background Debug Module)
CRG (Clock and Reset Generator)
–
Choice of low current Colpitts oscillator or standard Pierce Oscillator
–
PLL
–
COP watchdog
–
real time interrupt
–
clock monitor
8-bit and 4-bit ports with interrupt functionality
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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