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參數(shù)資料
| 型號： | S-93C66ADFJ |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS SERIAL E2PROM |
| 中文描述： | 的CMOS串行E2PROM |
| 文件頁數(shù)： | 7/53頁 |
| 文件大小： | 214K |
| 代理商： | S-93C66ADFJ |
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CMOS SERIAL E
2
PROM
S-93C46A
/
56A
/
66A
Seiko Instruments Inc.
6
n
Operation
Instructions (in the order of start-bit, instruction, address, and data) are latched to DI in synchronization with the rising
edge of SK after CS goes high. A start-bit can only be recognized when the high of DI is latched to the rising edge of SK
when CS goes from low to high, it is impossible for it to be recognized as long as DI is low, even if there are SK pulses after
CS goes high. Any SK pulses input while DI is low are called "dummy clocks." Dummy clocks can be used to adjust the
number of clock cycles needed by the serial IC to match those sent out by the CPU. Instruction input finishes when CS
goes low, where it must be low between commands during t
CDS
.
All input, including DI and SK signals, is ignored while CS is low, which is stand-by mode.
1. Read
The READ instruction reads data from a specified address. After A0 is latched at the rising edge of SK, DO output
changes from a high-impedance state (Hi-Z) to low level output. Data is continuously output in synchronization with the rise
of SK.
When all of the data (D0) in the specified address has been read, the data in the next address can be read with the input
of another SK clock. Thus, it is possible for all of the data addresses to be read through the continuous input of SK clocks
as long as CS is high.
The last address (An
A1 A0 = 1
11) rolls over to the top address (An
A1 A0 = 0
00).
Figure 5
Read Timing (S-93C56A)
Figure 4
Read Timing (S-93C46A)
A
5
A
4
A
3
A
2
A
1
A
0
+1
A
5
A
4
A
3
A
2
A
1
A
0
+2
D
15
D
15
D
14
D
14
D
13
D
14
Hi-Z
D
13
D
0
D
1
D
2
D
15
0
Hi-Z
A
0
A
1
A
2
A
3
A
4
A
5
0
1
1
28
27
26
25
24
23
12
11
10
9
8
7
6
5
4
3
2
1
44
43
42
41
40
39
D
13
D
0
D
1
D
2
CS
SK
DI
DO
A
0
A
6
12
45
29
14
D
15
D
15
D
14
D
14
D
13
D
14
Hi-Z
A
6
A
5
A
4
A
3
A
2
A
1
A
0
+1
D
13
D
0
D
1
D
2
D
15
0
Hi-Z
A
1
A
2
A
3
A
4
A
5
X
0
1
1
28
27
26
25
24
11
10
9
8
7
6
5
4
3
2
1
44
43
42
41
40
A
6
A
5
A
4
A
3
A
2
A
1
A
0
+2
D
13
D
0
D
1
13
CS
SK
DI
DO
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S-93C66ADP | CMOS SERIAL E2PROM |
| S-93C66AFJ | CMOS SERIAL E2PROM |
| S-93C66AFT | CMOS SERIAL E2PROM |
| S-93C66AMFN | CMOS SERIAL E2PROM |
| S-93C46A | High Speed, Low Power 1K-bit EEPROM(高速，低功耗1K位串行EEPROM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S-93C66ADFJ-TB | 功能描述:電可擦除可編程只讀存儲器 4K (256X16) Hi-Speed RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| S-93C66ADP | 功能描述:電可擦除可編程只讀存儲器 4K (256X16) Hi-Speed RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| S-93C66AFJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS SERIAL E2PROM |
| S-93C66AFJ-TB | 功能描述:電可擦除可編程只讀存儲器 4K (256X16) 3-Wire RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| S-93C66AFT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS SERIAL E2PROM |
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