參數(shù)資料
型號(hào): S-8261ACAMD-G4AT2G
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6
封裝: LEAD FREE, SOT-23, 6 PIN
文件頁數(shù): 8/33頁
文件大?。?/td> 384K
代理商: S-8261ACAMD-G4AT2G
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-8261 Series
Rev.5.0_00
Seiko Instruments Inc.
16
(6) Test Condition 6, Test Circuit 3
(Internal Resistance between VM and VDD, Internal Resistance between VM and VSS)
The resistance between VM and VDD (RVMD) is the internal resistance between VM and VDD under the set
conditions of V1
= 1.8 V and V2 = 0 V.
The resistance between VM and VSS (RVMS) is the internal resistance between VM and VSS under the set
conditions of V1
= 3.5 V and V2 = 1.0 V.
(7) Test Condition 7, Test Circuit 4
(CO Pin Resistance “H”, CO Pin Resistance “L”)
The CO pin resistance “H” (RCOH) is the resistance the CO pin under the set condition of V1 = 3.5 V, V2 = 0 V and V3
= 3.0 V.
The CO pin resistance “L” (RCOL) is the resistance the CO pin under the set condition of V1 = 4.5 V, V2 = 0 V and V3
= 0.5 V.
(8) Test Condition 8, Test Circuit 4
(DO Pin Resistance “H”, DO Pin Resistance “L”)
The DO pin resistance “H” (RDOH) is the resistance the DO pin under the set condition of V1 = 3.5 V, V2 = 0 V and V4
= 3.0 V.
The DO pin resistance “L” (RDOL) is the resistance the DO pin under the set condition of V1 = 1.8 V, V2 = 0 V and V4
= 0.5 V.
(9) Test Condition 9, Test Circuit 5
(Overcharge Detection Delay Time, Overdischarge Detection Delay Time)
The overcharge detection delay time (tCU) is the time needed for VCO to change from “H” to “L” just after the voltage
V1 momentarily increases (within 10
μs) from the overcharge detection voltage (V
CU) 0.2 V to the overcharge
detection voltage (VCU) + 0.2 V under the set condition of V2 = 0 V.
The overdischarge detection delay time (tDL) is the time needed for VDO to change from “H” to “L” just after the
voltage V1 momentarily decreases (within 10
μs) from the overdischarge detection voltage (V
DL) +0.2 V to the
overdischarge detection voltage (VDL) 0.2 V under the set condition of V2 = 0 V.
(10) Test Condition 10, Test Circuit 5
(Overcurrent 1 Detection Delay Time, Overcurrent 2 Detection Delay Time, Load Short-circuiting Detection
Delay Time, Abnormal Charge Current Detection Delay Time)
The overcurrent 1 detection delay time (tIOV1) is the time needed for VDO to go “L” after the voltage V2 momentarily
increases (within 10
μs) from 0 V to 0.35 V under the set condition of V1 = 3.5 V and V2=0 V.
The overcurrent 2 detection delay time (tIOV2) is the time needed for VDO to go “L” after the voltage V2 momentarily
increases (within 10
μs) from 0 V to 0.7 V under the set condition of V1 = 3.5 V and V2 = 0 V.
The load short-circuiting detection delay time (tSHORT) is the time needed for VDO to go “L” after the voltage V2
momentarily increases (within 10
μs) from 0 V to 1.6 V under the set condition of V1 = 3.5 V and V2 = 0 V.
The abnormal charge current detection delay time is the time needed for VCO to go from “H” to “L” after the voltage
V2 momentarily decreases (within 10
μs) from 0 V to 1.1 V under the set condition of V1 = 3.5 V and V2 = 0 V. The
abnormal charge current detection delay time has the same value as the overcharge detection delay time.
(11) Test Condition 11, Test Circuit 2 (Product with 0 V battery charge function)
(0 V Battery Charge Starting Charger Voltage)
The 0 V battery charge starting charger voltage (V0CHA) is defined as the voltage between VDD and VM at which VCO
goes “H” (VVM + 0.1 V or higher) when the voltage V2 is gradually decreased from the starting condition of V1 = V2 =
0 V.
(12) Test Condition 12, Test Circuit 2 (Product with 0 V battery charge inhibition function)
(0 V Battery Charge Inhibition Battery Voltage)
The 0 V battery charge inhibition battery voltage (V0INH) is defined as the voltage between VDD and VSS at which
VCO goes “H” (VVM + 0.1 V or higher) when the voltage V1 is gradually increased from the starting condition of V1 = 0
V and V2
= 4 V.
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