參數(shù)資料
型號(hào)： S-8233CAFT-TB-G
廠商： Seiko Instruments Inc.
英文描述： BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK
中文描述： 電池保護(hù)IC 3串行用電池
文件頁(yè)數(shù)： 18/26頁(yè)
文件大?。?/td> 568K
代理商： S-8233CAFT-TB-G
BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK
S-8233C Series
Rev.4.0
_00
Battery Protection IC Connection Example
Seiko Instruments Inc.
18
Over charge delay
time setting
Over current delay
time setting
Over discharge delay
time setting
CTL terminal voltage
GND: Normal operation
Floating or V
: Inhibit
charging and discharging
High: Inhibit over
discharge detection
FET-C
EB+
EB-
S-8233C series
R1
VSS
DOP
CTL
VC2
VMP
VC1
C6
CCT
COVT
CDT
Battery 1
Battery 3
Battery 2
VCC
CD1
CD3
CD2
R2
C1
C2
C3
COP
Nch open
drain
FET-A
C4
R3
R6
1 M
10 k
R5
C5
FET-B
Over charge
Condition
Over current
Condition
Over discharge
Condition
1 k
R7
Figure 8
[Description of
Figure 8
]
z
The over charge detection delay time (t
CU1
to t
CU3
), over discharge detection delay time (t
DD1
to t
DD3
), and
over current detection delay time (t
IOV1
) are changed with external capacitors (C4 to C6). See the electrical
characteristics.
z
R6 is a pull-up resistor that turns FET-B off when the COP terminal is opened. Connect a 100 k
to
1 M
resistor.
z
R5 is used to protect the IC if the charger is connected in reverse. Connect a 10 k
to 50 k
resistor.
z
If capacitor C6 is absent, rush current occurs when a capacitive load is connected and the IC enters the
over current mode. C6 must be connected to prevent it.
z
If capacitor C5 is not connected, the IC may enter the over discharge condition due to variations of battery
voltage when the over current occurs. In this case, a charger must be connected to return to the normal
condition. To prevent this, connect an at least 0.01
μ
F capacitor to C5.
z
If a leak current flows between the delay capacitor connection terminal (CCT, CDT, or COVT) and VSS, the
delay time increases and an error occurs. The leak current must be 100 nA or less.
z
Over discharge detection can be disabled by using FET-C. The FET-C off leak must be 0.1
μ
A or less. If
over discharge is inhibited by using this FET, the current consumption does not fall below 0.1
μ
A even
when the battery voltage drops and the IC enters the over discharge detection mode.
z
R1, R2, and R3 must be 1 k
or less.
z
R7 is the protection of the CTL when the CTL terminal voltage higher than V
CC
voltage. Connect a 300
to
5 k
resister. If the CTL terminal voltage never greater than the V
CC
voltage (ex. R7 connect to V
SS
),
without R7 resister is allowed.
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