參數(shù)資料
型號(hào): S-7750C71XX-HCT1
元件分類(lèi): 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA16
封裝: 1.93 X 2.07 MM, 0.6 MM HEIGHT, LEAD FREE, WLP-16
文件頁(yè)數(shù): 13/44頁(yè)
文件大?。?/td> 563K
代理商: S-7750C71XX-HCT1
PROGRAMMABLE PORT CONTROLLER (PORT EXPANDER WITH BUILT-IN E2PROM CIRCUIT)
S-7750C
Rev.2.0_00
Seiko Instruments Inc.
20
4. Acknowledgment
Data is transmitted sequentially in 8-bit. Changing the SDA line to “L” indicates that the devices on the system bus
have received data, thus the devices send an acknowledgment signal back during the 9th clock of cycle.
The S-7750C does not send an acknowledgment signal back during the Write operation.
1
8
9
Acknowledgment
signal output
Start
Condition
SCL
(
Input)
SDA
(Master device
’s output)
SDA
(
Output)
Figure 23 Acknowledgment Output Timing 1
The both commands, reload command and switching access to register / E
2PROM command are 1-byte, but inputting them
as the command 2-byte or more is possible by adding dummy data. However, the S-7750C executes the command at the
moment that it has loaded 9-bit. And in this case, inputting clock 2-byte or more after inputting these commands makes the
SDA pin set in high-impedance. However, in the acknowledgment timing, S-7750C sends acknowledgment signal back
regardless of the setting at
W
/
R
bit. Figure 24 shows the output timing of acknowledgment signal.
SCL
SDA
High-Impedance
Acknowledgement Signal from S-7750C
R / W
Device Code
Command
(0000 or 0001)
Start Condition
Stop Condition
High-Impedance
Figure 24 Acknowledgment Output Timing 2
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