參數(shù)資料
型號: S-4602A
廠商: Seiko Instruments Inc.
英文描述: CMOS Thermal Print Head Driver Containing a 64-Bit Shift Register and a Latch(內(nèi)置一個(gè)64位移位寄存器和一個(gè)鎖存器的CMOS 熱敏打印頭驅(qū)動器)
中文描述: 熱打印頭的CMOS驅(qū)動含64位移位寄存器和鎖存器(內(nèi)置一個(gè)64位移位寄存器和一個(gè)鎖存器的的CMOS熱敏打印頭驅(qū)動器)
文件頁數(shù): 3/5頁
文件大?。?/td> 38K
代理商: S-4602A
64-bit THERMAL HEAD DRIVER
S-4602A
Operation
2
Seiko Instruments Inc.
Terminal Functions
(Refer to the dimensions for the pad arrangement)
Absolute Maximum Ratings
No.
1 to 64
65, 66, 73,
74, 80, 81
71, 78
67, 75
77
79
68
Name
Functions
DO
1
to DO
64
( DOn)
Driver output terminals (Nch open-drain)
V
SS1
GND for driver (0 V)
V
DD
V
SS0
CLK
SI
SO
Positive power supply for logic (+5 V)
GND for logic (0 V)
Clock input terminal for 64-bit shift register
Serial data input terminal for 64-bit shift register
Serial data output terminal for 64-bit shift register
Data latch signal input terminal
When CONT=
L
or open
LATCH=
L
: reads the data of the shift register
LATCH=
H
: holds the preceding data
When CONT=
H
LATCH=
L
: holds the preceding data
LATCH=
H
: reads the data of the shift register
Data latch signal control terminal : selects
H
or
L
for
LATCH(pull-down resistor is built in)
Driver enable terminal : outputs the latch data to the
driver when
L
(pull-up resistor is built in)
Driver enable terminal : outputs the latch data to the
driver when
H
(pull-down resistor is built in)
69
LATCH
72
CONT
76
AEN
70
BEN
Parameter
Symbol
V
SS0,1
- V
DD
V
DOH
I
DOL
V
IN
V
OUT
T
jMAX
T
opr
T
stg
Ratings
-0.4 to +7.0
36
30
V
SS0
-0.5 to V
DD
+0.5
V
SS0
-0.5 to V
DD
+0.5
125
-10 to +80
-40 to +125
Unit
V
V
mA
V
V
°
C
°
C
°
C
Supply voltage
Driver output voltage
Driver output current
Input voltage
Output voltage
Max. junction temperature
Operating temperature
Storage temperature
The 64-bit shift register reads the data input to SI on the rising edge of the CLOCK input.
The latch circuit operates depending on the levels of CONT and LATCH ; it reads the data of the shift register
when their levels are the same, and it holds the data of the shift register when they differ.
The latch data are output to the respective drivers when AEN is low and BEN is high. The driver output
transistor turns on when the latch data are high and turns off when low. Turning AEN high or BEN low makes
all driver output transistors go off.
All driver output transistors go off when power supply voltage becomes lower than V
DET
regardless of all input
signals.
Table 1
Table 2
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