參數(shù)資料
型號: S-35190A-J8T1G
元件分類: 時鐘/數(shù)據(jù)恢復及定時提取
英文描述: 1 TIMER(S), REAL TIME CLOCK, PDSO8
封裝: LEAD FREE, SOP-8
文件頁數(shù): 10/55頁
文件大小: 488K
代理商: S-35190A-J8T1G
3-WIRE REAL-TIME CLOCK
S-35190A
Rev.3.0_00
Seiko Instruments Inc.
18
Power-on Detection Circuit and Register Status
The power-on detection circuit operates by power-on the S-35190A, as a result each register is cleared; each register is set
as follows.
Real-time data register :
00 (Y), 01 (M), 01 (D), 0 (day of the week), 00 (H), 00 (M), 00 (S)
Status register 1 :
“01h”
Status register 2 :
“80h”
INT register 1 :
“80h”
INT register 2 :
“00h”
Clock correction register :
“00h”
Free register :
“00h”
“1” is set in the POC flag (B0 in the status register 1) to indicate that power has been applied. To correct the oscillation
frequency, the status register 2 goes in the mode the output of user-set frequency, so that 1 Hz clock pulse is output from
the INT pin. When “1” is set in the POC flag, be sure to initialize. The POC flag is set to “0” due to initialization so that the
output of user-set frequency mode is cleared. (Refer to “ Register Status After Initialization”.)
For the regular operation of power-on detection circuit, as seen in Figure 22, the period to power-up the S-35190A is that
the voltage reaches 1.3 V within 10 ms after setting the IC’s power supply voltage at 0 V. When the power-on detection
circuit is not working normally is; the POC flag (B0 in the status register) is not in “1”, or 1 Hz is not output from the INT pin.
In this case, power-on the S-35190A once again because the internal data may be in the indefinite status.
Do not transmit data immediately after power-on at least 0.5 sec because the power-on detection circuit is operating.
Within 10 ms
1.3 V
0 V
*1
*1.
0 V indicates that there are no potential differences between the VDD
pin and VSS pin of the S-35190A.
Figure 22 How to Raise the Power Supply Voltage
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