參數(shù)資料
型號(hào): S-29Z330A
廠商: Seiko Instruments Inc.
英文描述: 256-Word x 16-Bit CMOS Serial EEPROM(4K位CMOS串行EEPROM)
中文描述: 256字× 16位的CMOS串行EEPROM(4K的位的CMOS串行EEPROM的)
文件頁數(shù): 8/41頁
文件大小: 166K
代理商: S-29Z330A
CMOS SERIAL E
2
PROM
S-29ZX30A
7
2.1 WRITE
This instruction writes 16-bit data to a specified address.
After changing CS to high, input a start-bit, op-code (WRITE), address, and 16-bit data. If there is a data overflow of more
than 16 bits, only the last 16-bits of the data is considered valid. Changing CS to low will start the WRITE operation. It is
not necessary to make the data "1" before initiating the WRITE operation.
Figure 6
WRITE Timing (S-29Z330A)
t
CDS
t
PR
busy
Hi-Z
t
SV
VERIFY
Standby
Hi-Z
1
CS
SK
DI
DO
t
HZ1
2
3
4
5
6
7
8
9
10
11
12
27
0
1
D0
ready
A7
A6
A5
A4
A3
A2
A1
A0
D15
Figure 7
WRITE Timing (S-29Z430A)
t
CDS
t
PR
busy
Hi-Z
t
SV
VERIFY
Hi-Z
1
CS
SK
DI
DO
t
HZ1
2
3
4
5
6
7
8
9
10
14
29
0
1
D0
ready
A3
A2
A1
A0
D15
2. Write (WRITE, ERASE)
There are two write instructions, WRITE and ERASE. Each automatically begins writing to the non-volatile memory
when CS goes low at the completion of the specified clock input.
The write operation is completed in 10 ms (t
PR
Max.), and the typical write period is less than 4 ms. In the S-
29ZX30A series, it is easy to VERIFY the completion of the write operation in order to minimize the write cycle by setting
CS to high and checking the DO pin, which is low during the write operation and high after its completion. This VERIFY
procedure can be executed over and over again. There are two methods to detect a change in the DO output. One is to
detect a change from low to high setting CS to high, and the other is to detect a change from low to high as a result of
repetitious operations of returning the CS to low after setting CS to high and checking the DO output.
Because all SK and DI inputs are ignored during the write operation, any input of instruction will also be disregarded.
When DO outputs high after completion of the write operation or if it is in the high-impedence state (Hi-Z), the input of
instructions is available. Even if the DO pin remains high, it will enter the high-impedence state upon the recognition of
a high of DI (start-bit) attached to the rising edge of an SK pulse. (see Figure 3).
DI input should be low during the VERIFY procedure.
11
12
13
A8
A7
A6
A5
A4
X
Standby
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