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參數(shù)資料
| 型號： | S-29L130A |
| 廠商： | Seiko Instruments Inc. |
| 英文描述： | 1Kbit CMOS Serial EEPROM(1K位CMOS串行EEPROM) |
| 中文描述： | 1Kbit的CMOS串行EEPROM（每1000位的CMOS串行EEPROM的） |
| 文件頁數(shù)： | 7/42頁 |
| 文件大?。?/td> | 196K |
| 代理商： | S-29L130A |
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CMOS SERIAL E
2
PROM
S-29LXX0A Series
6
Seiko Instruments Inc.
2.
WRITE (WRITE, ERASE)
There are two write instructions, WRITE and ERASE. Each automatically begins writing to the non-volatile memory
when CS goes low at the completion of the specified clock input.
The write operation is completed in 10 ms (t
PR
Max.), and the typical write period is less than 5 ms. In the S-
29LXX0A Series, it is easy to VERIFY the completion of the write operation in order to minimize the write cycle by
setting CS to high and checking the DO pin, which is low during the write operation and high after its completion.
This VERIFY procedure can be executed over and over again.
Because all SK and DI inputs are ignored during the write operation, any input of instruction will also be disregarded.
When DO outputs high after completion of the write operation or if it is in the high-impedence state (Hi-Z), the input of
instructions is available. Even if the DO pin remains high, it will enter the high-impedence state upon the recognition
of a high of DI (start-bit) attached to the rising edge of an SK pulse (see Figure 3).
DI input should be low during the VERIFY procedure.
2.1 WRITE
This instruction writes 16-bit data to a specified address.
After changing CS to high, input a start-bit, op-code (WRITE), address, and 16-bit data. If there is a data overflow of
more than 16 bits, only the last 16-bits of the data is considered valid. Changing CS to low will start the WRITE
operation. It is not necessary to make the data "1" before initiating the WRITE operation.
Figure 7
WRITE Timing (S-29L130A)
t
CDS
t
PR
busy
Hi-Z
t
SV
VERIFY
Hi-Z
1
CS
SK
DI
DO
t
HZ1
2
3
4
5
6
7
8
9
10
25
0
1
D0
ready
A5
A4
A3
A2
A1
A0
D15
Figure 8
WRITE Timing (S-29L220A)
t
CDS
t
PR
busy
Hi-Z
t
SV
VERIFY
Hi-Z
1
CS
SK
DI
DO
t
HZ1
2
3
4
5
6
7
8
9
10
11
12
27
0
1
D0
ready
X
A6
A5
A4
A3
A2
A1
A0
D15
Figure 9
WRITE Timing (S-29L330A)
t
CDS
t
PR
busy
Hi-Z
t
SV
VERIFY
Hi-Z
1
CS
SK
DI
DO
t
HZ1
2
3
4
5
6
7
8
9
10
11
12
27
0
1
D0
ready
A7
A6
A5
A4
A3
A2
A1
A0
D15
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S-29L131A | 1Kbit CMOS Serial EEPROM(1K位CMOS串行EEPROM) |
| S-29L220A | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| S-29L220ADFE | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| S-29L220AFE | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| S-29L220AFS | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S-29L130ADFE | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM |
| S-29L130AFE | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM |
| S-29L130AFS | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM |
| S-29L131A | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM |
| S-29L131ADFE | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM |
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