• <var id="z87dq"></var>
    • <form id="z87dq"></form>
      <code id="z87dq"><input id="z87dq"></input></code>
    • <big id="z87dq"><form id="z87dq"></form></big>
    • 參數(shù)資料
      型號(hào): RTL8201CP-VD
      廠商: Electronic Theatre Controls, Inc.
      英文描述: SINGLE-CHIP/SINGLE-PORT 10/100M FAST ETHERNET PHYCEIVER (With Auto Crossover)
      中文描述: SINGLE-CHIP/SINGLE-PORT個(gè)10/100M快速以太網(wǎng)PHYCEIVER(自動(dòng)交叉)
      文件頁(yè)數(shù): 3/38頁(yè)
      文件大?。?/td> 512K
      代理商: RTL8201CP-VD
      RTL8201CP
      Datasheet
      Single-Chip/Port 10/100 Fast Ethernet PHYceiver
      iii
      Track ID: JATR-1076-21 Rev. 1.21
      Table of Contents
      1.
      2.
      3.
      4.
      5.
      GENERAL DESCRIPTION................................................................................................................................................1
      FEATURES...........................................................................................................................................................................1
      BLOCK DIAGRAM.............................................................................................................................................................2
      PIN ASSIGNMENTS...........................................................................................................................................................3
      PIN DESCRIPTION............................................................................................................................................................4
      5.1.
      MII I
      NTERFACE
      ............................................................................................................................................................4
      5.2.
      SNI (S
      ERIAL
      N
      ETWORK
      I
      NTERFACE
      ) 10M
      BPS
      O
      NLY
      ....................................................................................................5
      5.3.
      C
      LOCK
      I
      NTERFACE
      .......................................................................................................................................................5
      5.4.
      10M
      BPS
      /100M
      BPS
      N
      ETWORK
      I
      NTERFACE
      ....................................................................................................................5
      5.5.
      D
      EVICE
      C
      ONFIGURATION
      I
      NTERFACE
      ...........................................................................................................................6
      5.6.
      LED I
      NTERFACE
      /PHY A
      DDRESS
      C
      ONFIGURATION
      .......................................................................................................6
      5.7.
      P
      OWER AND
      G
      ROUND
      P
      INS
      ..........................................................................................................................................7
      5.8.
      R
      ESET AND
      O
      THER
      P
      INS
      ...............................................................................................................................................7
      6.
      REGISTER DESCRIPTIONS ............................................................................................................................................8
      6.1.
      R
      EGISTER
      0 B
      ASIC
      M
      ODE
      C
      ONTROL
      R
      EGISTER
      ............................................................................................................8
      6.2.
      R
      EGISTER
      1 B
      ASIC
      M
      ODE
      S
      TATUS
      R
      EGISTER
      ...............................................................................................................9
      6.3.
      R
      EGISTER
      2 PHY I
      DENTIFIER
      R
      EGISTER
      1 ...................................................................................................................9
      6.4.
      R
      EGISTER
      3 PHY I
      DENTIFIER
      R
      EGISTER
      2 ...................................................................................................................9
      6.5.
      R
      EGISTER
      4 A
      UTO
      -N
      EGOTIATION
      A
      DVERTISEMENT
      R
      EGISTER
      (ANAR)....................................................................10
      6.6.
      R
      EGISTER
      5 A
      UTO
      -N
      EGOTIATION
      L
      INK
      P
      ARTNER
      A
      BILITY
      R
      EGISTER
      (ANLPAR)......................................................10
      6.7.
      R
      EGISTER
      6 A
      UTO
      -N
      EGOTIATION
      E
      XPANSION
      R
      EGISTER
      (ANER).............................................................................11
      6.8.
      R
      EGISTER
      16 NW
      AY
      S
      ETUP
      R
      EGISTER
      (NSR)............................................................................................................12
      6.9.
      R
      EGISTER
      17 L
      OOPBACK
      , B
      YPASS
      , R
      ECEIVER
      E
      RROR
      M
      ASK
      R
      EGISTER
      (LBREMR) ................................................12
      6.10.
      R
      EGISTER
      18 RX_ER C
      OUNTER
      (REC).....................................................................................................................13
      6.11.
      R
      EGISTER
      19 SNR D
      ISPLAY
      R
      EGISTER
      ......................................................................................................................13
      6.12.
      R
      EGISTER
      25 T
      EST
      R
      EGISTER
      .....................................................................................................................................13
      7.
      FUNCTIONAL DESCRIPTION.......................................................................................................................................14
      7.1.
      MII
      AND
      M
      ANAGEMENT
      I
      NTERFACE
      ..........................................................................................................................14
      7.1.1.
      Data Transition.....................................................................................................................................................14
      7.1.2.
      Serial Management...............................................................................................................................................15
      7.2.
      A
      UTO
      -N
      EGOTIATION AND
      P
      ARALLEL
      D
      ETECTION
      ......................................................................................................16
      7.2.1.
      Setting the Medium Type and Interface Mode to MAC.........................................................................................16
      7.2.2.
      UTP Mode and MII Interface...............................................................................................................................16
      7.2.3.
      UTP Mode and SNI Interface...............................................................................................................................17
      7.2.4.
      Fiber Mode and MII Interface..............................................................................................................................17
      7.3.
      F
      LOW
      C
      ONTROL
      S
      UPPORT
      ..........................................................................................................................................17
      7.4.
      H
      ARDWARE
      C
      ONFIGURATION AND
      A
      UTO
      -N
      EGOTIATION
      ............................................................................................18
      7.5.
      LED
      AND
      PHY A
      DDRESS
      C
      ONFIGURATION
      ................................................................................................................19
      7.6.
      S
      ERIAL
      N
      ETWORK
      I
      NTERFACE
      ....................................................................................................................................20
      7.7.
      P
      OWER
      D
      OWN
      , L
      INK
      D
      OWN
      , P
      OWER
      S
      AVING
      ,
      AND
      I
      SOLATION
      M
      ODES
      ......................................................................20
      7.8.
      M
      EDIA
      I
      NTERFACE
      .....................................................................................................................................................20
      7.8.1.
      100Base-TX..........................................................................................................................................................20
      7.8.2.
      100Base-FX Fiber Mode Operation.....................................................................................................................21
      7.8.3.
      10Base-T TX/RX...................................................................................................................................................21
      7.9.
      R
      EPEATER
      M
      ODE
      O
      PERATION
      .....................................................................................................................................22
      7.10.
      R
      ESET
      ,
      AND
      T
      RANSMIT
      B
      IAS
      ......................................................................................................................................22
      7.11.
      3.3V P
      OWER
      S
      UPPLY AND
      V
      OLTAGE
      C
      ONVERSION
      C
      IRCUIT
      .......................................................................................22
      相關(guān)PDF資料
      PDF描述
      RTL8201CP-VD-LF SINGLE-CHIP/SINGLE-PORT 10/100M FAST ETHERNET PHYCEIVER (With Auto Crossover)
      RT ECONOLINE - DC/DC - CONVERTER
      S101032SS02BE Slide Switches
      S101031SS02B Slide Switches
      S101031SS02BE Slide Switches
      相關(guān)代理商/技術(shù)參數(shù)
      參數(shù)描述
      RTL8201CP-VD-LF 制造商:WIZnet Co Ltd 功能描述:Physical I/F Chip+Auto-Crossover,Realtek 制造商:Realtek Semiconductor 功能描述: 制造商:WIZnet Co Ltd 功能描述:IC,RTL8201CP-VD-LF 制造商:WIZNET INC 功能描述:IC,RTL8201CP-VD-LF
      RTL8201CP電路圖-1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RTL8201CP電路圖-1
      RTL8201CP電路圖-3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RTL8201CP電路圖-3
      RTL8201EL 制造商:Realtek Semiconductor 功能描述:IC,LAN TRANSCEIVER,SINGLE,CMOS,QFP,48PIN,PLASTIC
      RTL8201F 制造商:Realtek 功能描述:10/100 PHY recevier