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參數(shù)資料
| 型號： | RT9199PSP |
| 廠商： | Richtek Technology Corporation |
| 英文描述： | Cost-Effective, 2A Peak Sink/Source Bus Termination Regulator |
| 中文描述： | 成本效益，2A峰值匯/源總線終端穩(wěn)壓器 |
| 文件頁數(shù)： | 9/13頁 |
| 文件大小： | 214K |
| 代理商： | RT9199PSP |
RT9199
9
DS9199-07 September 2007
www.richtek.com
General Regulator
The RT9199 could also serves as a general linear regulator.
The RT9199 accepts an external reference voltage at
REFEN pin and provides output voltage regulated to this
reference voltage as shown in Figure 6, where
V
OUT
= V
REFEN
x
R2/(R1+R2)
As other linear regulator, dropout voltage and thermal issue
should be specially considered. Figure 7 shows the R
DS(ON)
over temperature of RT9199.
The minimum dropout voltage
could be obtained by the product of R
DS(ON)
and output
current. For thermal consideration, please refer to the
relative sections
.
Application Information
Consideration while designing the resistance of
voltage divider
Refer to the
“
Typical Application Circuit
”
.Make sure the
current sinking capability of pull-down NMOS is enough
for the chosen voltage divider to pull-down the voltage at
REFEN pin below 0.15V to shutdo
wn the device.
In addition, the
capacitor C
SS
and volt
age divider form the
low-pass filter. There are two reasons doing this design;
one is for output voltage soft-start while another is for noise
immunity.
How to reduce power dissipation on Notebook PC
or the dual channel DDR SDRAM application
In notebook application, using RichTek's Patent
“
D
istributed Bus Terminator Topology
”
with choosing
RichTek's product is encouraged.
Distributed Bus Terminating Topology
R0
R9
R8
R7
R6
R5
R4
R3
R2
R1
R(2N)
R(2N+1)
RT9199
RT9199
VOUT
VOUT
REFEN
BUS(0)
BUS(1)
BUS(2)
BUS(3)
BUS(4)
BUS(5)
BUS(6)
BUS(7)
BUS(8)
BUS(9)
BUS(2N)
BUS(2N+1)
Terminator Resistor
Input Capacitor and Layout Consideration
Place the input bypass capacitor as close as possible to
the RT9199. A low ESR capacitor larger than 470uF is
recommended for the input capacitor. Use short and wide
traces to minimize parasitic resistance and inductance.
Inappropriate layout may result in large parasitic inductance
and cause undesired oscillation between RT9199 and the
preceding power converter.
Thermal Consideration
RT9199 regulators have internal thermal limiting circuitry
designed to protect the device during overload conditions.
For continued operation, do not exceed absolute maximum
operation junction temperature 125
°
C. The power
dissipation definition in device is:
P
D
= (V
IN
- V
OUT
) x I
OUT
+ V
IN
x I
Q
Figure 6
VCNTL
REFEN
GND
VIN
VOUT
RT9199
V
REFEN
R1
R2
Figure 7
R
DS(ON)
vs. Temperature
0.28
0.3
0.32
0.34
0.36
0.38
0.4
0.42
0.44
0.46
0.48
-50
-25
0
25
50
75
100
125
Temperature
R
D
)
V
CNTL
= 5V
, V
REFEN
= 1V
(
°
C)
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