參數(shù)資料
型號: RT9185AGM5
廠商: Richtek Technology Corporation
英文描述: Triple, Ultra-Fast CMOS LDO Regulator
中文描述: 三,超高速的CMOS LDO穩(wěn)壓器
文件頁數(shù): 10/14頁
文件大小: 195K
代理商: RT9185AGM5
RT9185
10
DS9185-11 March 2007
www.richtek.com
P
D
= (V
DD
-
V
OUT1
) I
OUT1
+ (V
DD
- V
OUT2
) I
OUT2
+ (V
DD
-
V
OUT3
) I
OUT3
+ V
IN
I
GND
Although the device is rated for 1.5A, 0.8A and 0.3A of
output current, the application may limit the amount of
output current based on the total power dissipation and
the ambient temperature. The final operating junction
temperature for any set of conditions can be estimated by
the following thermal equation:
P
D (MAX)
= ( T
J (MAX)
- T
A
) /
θ
JA
Where T
J (MAX)
is the maximum junction temperature of
the die (125°C) and T
A
is the maximum ambient
temperature.
θ
JA
is the thermal resistance from the junction
to the surrounding environment which is combined with
θ
JC
+
θ
CA
. Where
θ
JC
is junction to case thermal resistance
which for fused SOP-8 is 20
°
C/W, TO-252-5 is 10
°
C/W
and TO-263-5 is 5.5
°
C/W,
θ
CA
is case to ambient thermal
resistance which depend on PCB board area and air flow.
PCB Layout
The RT9185 is a fixed output voltage regulator which the
voltage are sensed at the output pin. A long PCB trace to
load will cause a voltage drop between load and RT9185.
Be careful with PCB layout which minimum the output
trace length and maximum the trace width.
VDD
VOUT1
VOUT3
GND
VOUT2
DROP = I
O
* RP
RP
LOAD
+
+
GND PLANE
I
O
TRACE RESISTANCE
RT9185
The GND pin of the RT9185 performs the dual function of
providing an electrical connection to ground and channeling
heat away. Connect the GND pin to ground using a large
pad or ground plane.
Good board layout practices must be used or instability
can be induced because of ground loops and voltage drops.
The input and output capacitors
MUST
be directly
connected to the input, output, and ground pins of the
device using traces which have no other currents flowing
through them. The best way to do this is to layout C
IN
and
C
OUT
near the device with short traces to the V
DD
, V
OUT
,
and ground pins.
The regulator ground pin should be connected to the
external circuit ground so that the regulator and its
capacitors have a
single point ground
.
It should be noted that stability problems have been seen
in applications where
vias
to an internal ground plane
were used at the ground points of the device and the input
and output capacitors. This was caused by varying ground
potentials at these nodes resulting from current flowing
through the ground plane. Using a single point ground
technique for the regulator and it's capacitors fixed the
problem. Since high current flows through the traces going
into V
IN
and coming from V
OUT
, Kelvin connect the capacitor
leads to these pins so there is no voltage drop in series
with the input and output capacitors.
Optimum performance can only be achieved when the
device is mounted on a PC board according to the diagram
below:
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