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參數(shù)資料
| 型號： | RT9183L-25GM5 |
| 廠商： | Richtek Technology Corporation |
| 英文描述： | Ultra Low Dropout 1.5A Linear Regulator |
| 中文描述： | 1.5A的超低壓差線性穩(wěn)壓器 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 225K |
| 代理商： | RT9183L-25GM5 |
RT9183
11
DS9183-12 March 2007
www.richtek.com
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula:
P
D(MAX)
= ( T
J(MAX)
- T
A
) /
θ
JA
Where T
J(MAX)
is the maximum operation junction
temperature 125
°
C, T
A
is the ambient temperature and
the
θ
JA
is the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT9183, where T
J(MAX)
is the maximum junction
temperature of the die (125
°
C) and T
A
is the maximum
ambient temperature. The junction to ambient thermal
resistance (
θ
JA
is layout dependent) for SOT-223 package
is 115
°
C/W, SOT-223 package (F-Type) is 135
°
C/W,
SOP-8 package is 125
°
C/W, and TO-263 package is
45
°
C/W on standard JEDEC 51-3 thermal test board.
The maximum power dissipation depends on operating
ambient temperature for fixed T
J(MAX)
and thermal resistance
θ
JA
. For RT9183 packages, the Figure 4 of derating curves
allows the designer to see the effect of rising ambient
temperature on the maximum power allowed.
PCB Layout
Good board layout practices must be used or instability
can be induced because of ground loops and voltage drops.
The input and output capacitors
MUST
be directly
connected to the input, output, and ground pins of the
device using traces which have no other currents flowing
through them.
The best way to do this is to layout C
IN
and C
OUT
near the
device with short traces to the V
IN
, V
OUT
, and ground pins.
The regulator ground pin should be connected to the
external circuit ground so that the regulator and its
capacitors have a“single point ground” .
It should be noted that stability problems have been seen
in applications where “vias ” to an internal ground plane
were used at the ground points of the device and the input
and output capacitors. This was caused by varying ground
potentials at these nodes resulting from current flowing
through the ground plane. Using a single point ground
technique for the regulator and it's capacitors fixed the
problem. Since high current flows through the traces going
into V
IN
and coming from V
OUT
, Kelvin connect the capacitor
leads to these pins so there is no voltage drop in series
with the input and output capacitors.
Optimum performance can only be achieved when the
device is mounted on a PC board according to the diagram
below:
SOP-8 Board Layout
GND
ADJ
GND
GND
V
IN
V
OUT
EN
+
+
+
Figure 4
0
400
800
1200
1600
2000
2400
0
25
50
75
100
125
Ambient temperature (
℃
M
(
°
C)
SOT-223
TO-263
SOP-8
SOT-223
(
F-Type
)
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| RT9183L-25GS | Ultra Low Dropout 1.5A Linear Regulator |
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| RT9183L-25PM | Ultra Low Dropout 1.5A Linear Regulator |
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