參數(shù)資料
型號: RT9014-JNPQW
廠商: Richtek Technology Corporation
英文描述: Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor
中文描述: 超低噪聲300mA的雙路LDO穩(wěn)壓器與葡萄牙,NMOS管驅(qū)動器,無需旁路電容
文件頁數(shù): 6/12頁
文件大?。?/td> 400K
代理商: RT9014-JNPQW
RT9014/A
Preliminary
6
DS9014/A-08 August 2007
www.richtek.com
Note 1.
Stresses listed as the above "Absolute Maximum Ratings"
may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2.
Devices are ESD sensitive. Handling precaution recommended.
Note 3.
The device is not guaranteed to function outside its operating conditions.
Note 4.
θ
JA
is measured in the natural convection at T
A
= 25
°
C on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
Note 5.
The dropout voltage is defined as V
IN
-V
OUT
, which is measured when V
OUT
is V
OUT(NORMAL)
100mV.
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
PSRR
I
LOAD
= 10mA
PSRR
f =100Hz
--
65
--
dB
f =1kHz
--
60
--
dB
f =10kHz
--
50
--
dB
PSRR
I
LOAD
= 150mA
PSRR
f =100Hz
--
65
--
dB
f =1kHz
--
50
--
dB
f =10kHz
--
50
--
dB
Power Good
Reset Threshold
V
THL
Low Threshold, % of nominal
V
OUT2
(Flag On)
85
90
93
%
V
THH
High Threshold, % of nominal
V
OUT2
(Flag Off)
I
LOW
= 250uA
92
95
98
%
POR Output Logic Low Voltage
V
OL
--
0.02
0.1
V
POR Leakage Current
I
POR
Flag Off
-1
0.01
1
μ
A
Set pin current source
V
SET
= 0
0.60
1.25
1.70
μ
A
Set pin threshold
POR = high
--
1.4
--
V
DRV output
Voltage Low
I
DRV
= 150mA
--
0.2
0.5
V
Leakage current
I
DRV
= 0mA, V
DRV
= 5V, SW = 0V
-1
0.01
1
μ
A
SW input current
V
IL
< 0.6V(DRV Shutdown)
-1
0.01
1
μ
A
V
IH
> 2.5V(DRV Enable)
-1
0.01
1
μ
A
SW input voltage
V
IL
Logic Low
--
--
0.4
V
V
IH
Logic High
1.5
--
--
V
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