參數(shù)資料
型號: RT8020DPQW
廠商: Richtek Technology Corporation
元件分類: DC/DC變換器
英文描述: Dual High-Efficiency PWM Step-Down DC-DC Converter
中文描述: 雙高效率的PWM降壓型DC - DC轉換器
文件頁數(shù): 12/14頁
文件大?。?/td> 229K
代理商: RT8020DPQW
RT8020
12
DS8020-03 August 2007
www.richtek.com
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
OUT
immediately shifts by an amount
equal to
I
LOAD
(ESR), where ESR is the effective series
resistance of C
OUT
.
I
LOAD
also begins to charge or
discharge C
OUT
generating a feedback error signal used
by the regulator to return V
OUT
to its steady-state value.
During this recovery time, V
OUT
can be monitored for
overshoot or ringing that would indicate a stability problem.
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of RT8020.
}
For the main current paths, keep their traces short and
wide.
}
Put the input capacitor as close as possible to the device
pins (VIN and GND).
}
LX node is with high frequency voltage swing and should
be kept small area. Keep analog components away from
LX node to prevent stray capacitive noise pick-up.
}
Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the RT8020.
}
Connect all analog grounds to a command node and
then connect the command node to the power ground
behind the output capacitors.
and the synchronous switch. Thus, the series resistance
looking into the LX pin is a function of both top and bottom
MOSFET R
DS(ON)
and the duty cycle (DC) is shown as
follows :
R
SW
= R
DS(ON)TOP
x DC + R
DS(ON)BOT
x (1
DC)
The R
DS(ON)
for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I
2
R losses, simply add R
SW
to R
L
and multiply the result by the square of the average output
current. Other losses including C
IN
and C
OUT
ESR
dissipative losses and inductor core losses generally
account for less than 2% of the total loss.
Thermal Considerations
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
P
D(MAX)
= ( T
J(MAX)
T
A
) /
θ
JA
Where T
J(MAX)
is the maximum junction temperature, T
A
is
the ambient temperature and the
θ
JA
is the junction to
ambient thermal resistance. For recommended operating
conditions specification of RT8020 DC/DC converter,
where T
J(MAX)
is the maximum junction temperature of
the die and T
A
is the ambient temperature. The junction
to ambient thermal resistance
θ
JA
is layout dependent.
For WDFN-12L 3x3 packages, the thermal resistance
θ
JA
is 60
°
C/W on the standard JEDEC 51-7 four-layers
thermal test board. The maximum power dissipation at
T
A
= 25
°
C can be calculated by following formula :
P
D(MAX)
= (125
°
C
25
°
C) / (60
°
C/W) = 1.667W for
WDFN-12L 3x3 packages
The maximum power dissipation depends on operating
ambient temperature for fixed T
J(MAX)
and thermal
resistance
θ
JA
. For RT8020 packages, the Figure 4 of de-
rating curves allows the designer to see the effect of rising
ambient temperature on the maximum power allowed.
Figure 4. De-rating Curves for RT8020 Package
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
0
25
50
75
100
125
Ambient Temperature (
°
C)
M
相關PDF資料
PDF描述
RT8020 Dual High-Efficiency PWM Step-Down DC-DC Converter
RT8020AGQW Dual High-Efficiency PWM Step-Down DC-DC Converter
RT8020APQW Dual High-Efficiency PWM Step-Down DC-DC Converter
RT8020BGQW Dual High-Efficiency PWM Step-Down DC-DC Converter
RT8020BPQW Dual High-Efficiency PWM Step-Down DC-DC Converter
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