參數(shù)資料
型號: RS5C321A
廠商: RICOH COMPANY LTD
元件分類: XO, clock
英文描述: ULTRA-COMPACT SERIAL REAL-TIME CLOCK ICs WITH 32.768kHz
中文描述: 0 TIMER(S), REAL TIME CLOCK, PDSO8
封裝: 0.65 MM PITCH, SSOP-8
文件頁數(shù): 29/33頁
文件大小: 252K
代理商: RS5C321A
RS5C321A/B
25
Ensure stable oscillation by preventing the following:
1) Condensation on the crystal oscillator
2) Instantaneous disconnection of power
3) Generation of clock noises, etc, in the crystal
oscillator
4) Charge of voltage exceeding prescribed maxi-
mum ratings to the individual pins of the IC
13. Typical Software-based Operations
13.1 Initialization upon Power-on
13.2 Write Operation to Clock and Calendar Counters
Start
XSTP=0
BSY=0
Control register 2
3h
(BANK
1)
32kHz clock pulse control
register
1h
(CLEN=1)
Control register 1
3h
Control register 2
1h, 9h
Set clock and calendar
counters and interrupt cycles.
Wait or
other
operations.
Power-on
YES
NO
YES
NO
*
1
*
2
*
3
*
4
*
6
*
5
BSY=0
Write to clock and
calendar
counters.
CE=L
Wait or
other
operations.
CE=L
Control register 1
0h
CE=H
YES
NO
*
1
*
2
*
3
*
4
*
1) Switch the CE pin to the low level immediately after power-on.
*
2) When not making oscillation halt sensing (data validity), the XSTP bit
need not be checked.
*
3) On powering on from 0V, 32KOUT pin outputs 32.768kHz clock pulses.
Set CLEN
1 when turning 32.768kHz off during initialization.
*
4) Set the ADJ bit to 1. When writing control register 1, if the oscillator has
operated, the XSTP bit is changed from 1 to 0.
*
5) It takes about 0.1 to 2 seconds to be set the BSY bit to 0 from oscillation
starting upon power-on from 0V. Provide an exit from an oscillation start
loop to prepare for oscillation failure.
*
6) Set the XSTP bit to 0 by writing data to the control register 1, and set to
the control register 2,
0h for the 12-hour time display system.
4h for the 24-hour time display system.
*
1) After switching the CE pin to the high level, hold it at the high level until
any subsequent operation requires switching it to the low level. (Note
that switching the CE pin to the low level sets the WTEN bit to 1.)
*
2) WTEN bit is set to 0.
*
3) The BSY bit is held at 1 for a maximum duration of 122.1μs.
*
4) Switch the CE pin to the low level to set the WTEN bit to 1. During write
operation to the clock and calendar counters, one 1-second digit carry
causes a 1-second increment while two 1-second digit carries also cause
only a 1-seconds increment, which, in turn, causes a time delay.
When Using the XSTP Bit
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RS5C321A/B 制造商:RICOH 制造商全稱:RICOH electronics devices division 功能描述:real-time clock ICs
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