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參數(shù)資料
| 型號： | RP5C15 |
| 廠商： | RICOH COMPANY LTD |
| 元件分類： | XO, clock |
| 英文描述： | REAL-TIME CLOCK |
| 中文描述： | 1 TIMER(S), REAL TIME CLOCK, PDIP18 |
| 封裝： | DIP-18 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 137K |
| 代理商： | RP5C15 |
RP/RF/RJ5C15
7
DSCONTNUED
ADJ (BANK1, Address 1h, D
0
)
1) For digits ranging from 00 to 29 : Resets the lower-order counter than the 1-second counter and sets the second
digit to 00.
2) For digits ranging from 30 to 59 : Resets the lower-order counter than the 1-second counter, sets the second
digit to 00 and increments the minute digit by 1.
MODE register (BANK1/0, Address Dh)
3
Timer EN Alarm EN
*
) When the Timer EN is set to 0, the 1-second counter and higher-order counters than the 1-second counter stop. If any carrying occurs in the lower-
order counters than the 1-second counter while the Timer EN is 0, carrying will be held and avoided until the Timer EN changes from 0 to 1. Thus, no
apparent delay is produced when the duration of the Timer EN = 0 is less than one second.
1: BANK1 : Setting and reading of alarm, 12-hour/24-hour,
leap year, clock output selection and adjust operation.
0: BANK0 : Setting and reading of time
1: Alarm output enable
0: Alarm output disable
(Note that 16Hz or 1Hz signals are not affected.)
1: Counting time starts ; 0 : the 1-second counter and
higher-order counters than the 1-second counter stop*
2
1
×
0
BANK1/0
12/24 select register (BANK1, Address Ah)
0
=1 sets to 24-hour system ; D
0
=0 sets to 12-hour system.
Set the 10-hour counter as D
1
=1 for p.m., D
1
=0 for a.m.
Leap year counter (BANK1, Address Bh)
(D
1
, D
0
)=(0, 0) sets the counter for leap years. The counter value changes in the order of (0, 0) (0, 1) (1, 0) (1, 1)
(0, 0) repeatedly in the same timing as the year counter.
RESET controller/16Hz · 1Hz clock register. (BANK1/0, Address Fh)
0
=1 : Resets all alarm registers.
1
=1 : Resets divider stages for seconds or smaller units.
2
=0 : 16Hz clock pulse ON.
3
=0 : 1Hz clock pulse ON.
Test register (BANK1/0, Address Eh)
Register used for LSI inspection. Recommended setting is (D
3
, D
2
, D
1
, D
0
)=(0, 0, 0, 0)
*
) Addresses 0h to Dh are applicable both for Read and Write.
*
) Addresses Eh to Fh are applicable only for Write.
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