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參數(shù)資料
| 型號： | RNA50C27AUS |
| 廠商： | Renesas Technology Corp. |
| 英文描述： | CMOS System-Reset IC |
| 中文描述： | 的CMOS系統(tǒng)復(fù)位IC |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 91K |
| 代理商： | RNA50C27AUS |
Rev.1.00 Apr 10, 2006 page 1 of 7
RNA50C27AUS
CMOS System-Reset IC
REJ03D0834-0100
Preliminary
Rev.1.00
Apr 10, 2006
Description
This IC facilitates complicated power-on and power-monitoring resets of microcomputers that require the 3.3-V and
1.8-V dual power supplies. It also facilitates change of delay time of reset signal by externally setting resistance and
capacity for delay time. By employing complementary open-drain output, desired output such as open-drain output and
CMOS output can be obtained.
Functions
3.3-V detection voltage
Accuracy of 3.3-V detection voltage
Hysteresis of 3.3-V detection voltage
Open-drain/CMOS output
1.8-V PMOS drive output
Ultra-small SSOP-8 package
: 2.7 V
:
±
1.0%
: 5% Typ.
Block Diagram
–
+
1
8
MR
VDD33
2
RESP
3
RESN
6
VDD18
Vref
Delay
7
CRext
4
GND
5 SWG
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