參數(shù)資料
型號: RJ80530VZ733256
英文描述: Microprocessor
中文描述: 微處理器
文件頁數(shù): 13/89頁
文件大?。?/td> 1672K
代理商: RJ80530VZ733256
Mobile Intel
Pentium
III Processor-M Datasheet
298340-002
Datasheet
13
2.
Mobile Intel Pentium III Processor-M
Features
2.1
New Features in the Mobile Pentium III Processor-M
2.1.1
133-MHz PSB With AGTL Signaling
The Mobile Pentium
III
Processor-M uses Assisted GTL (AGTL) signaling on the PSB interface. The
main difference between AGTL and GTL+ used on previous Intel processors is V
CCT
= 1.25V for
AGTL versus 1.5V for GTL+. The lower voltage swing enables high performance at lower power.
The Low Voltage Mobile Pentium
III
Processor-M will support 100-MHz and 133-MHz bus
frequencies. The Ultra Low Voltage Mobile Pentium
III
Processor-M supports a 100-MHz bus
frequency.
2.1.2
512K On-die Integrated L2 Cache
The 512K on die integrated L2 cache on the Mobile Pentium
III
Processor-M is double the L2 cache
size on the mobile Pentium
III
processor. The L2 cache runs at the processor core speed and the
increased cache size provides superior processing power.
2.1.3
Data Prefetch Logic
The Mobile Pentium
III
Processor-M features Data Prefetch Logic that speculatively fetches data to the
L2 cache before an L1 cache request occurs. This reduces transactions between the cache and system
memory reducing or eliminating bus cycle penalties, resulting in improved performance. The
processor also includes extensions to memory order and reorder buffers that boost performance.
2.1.4
Differential Clocking
The Mobile Intel Pentium
III
Processor-M is the first mobile Intel processor to support Differential
Clocking. Differential clocking requires the use of two complementary clocks: BCLK and BCLK#.
Benefits of differential clocking include easier scaling to lower voltages, reduced EMI, and less jitter.
All references to BCLK in this document apply to BCLK# also even if not explicitly stated. The
Mobile Intel Pentium
III
Processor-M will also support Single Ended Clocking. The processor will
configure itself for differential or single ended clocking based on the waveforms detected on the
BCLK and BCLK#/CLKREF signal lines.
2.1.5
Deeper Sleep State
The Deeper Sleep State is a new low power state on the Mobile Intel Pentium
III
Processor-M. It is
functionally identical to the Deep Sleep State but at a lower voltage. More details are provided in
Section 2.2.7.
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