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參數(shù)資料
| 型號： | RF9006 |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 88K |
| 代理商： | RF9006 |
8-117
RF9906
Rev C5 000822
8
F
NOT FOR NEWDESIGNS
SeeUpgradedProductsRF2449& RF2461
Pin
15
Function
LO BUFFER
ENABLE
Description
Enable pin for the LO output buffer amplifier. This is a digitally con-
trolled input. A logic "high" turns the buffer amplifier on, and the current
consumption increases by 3mA (with -3dBm LO input). A logic "low"
turns the buffer amplifier off. The threshold voltage is approximately
1.3V.
Optional Buffered LO Output. This pin is internally DC blocked and
matched to 50
. The buffer amplifier is switched on or off by the volt-
age level at pin 15.
Interface Schematic
16
LO BUFFER
OUT
17
18
GND
Same as pin 2.
MIXER RF
IN+
Mixer RF Balanced Input Pin. This pin is internally DC biased and
should be DC blocked if connected to a device with DC present. For
single-ended input operation, one pin is used as an input and the other
mixer RF input is bypassed to ground. In order to minimize the mixer’s
noise figure, the bypass capacitor must be a low input impedance at
the IF frequency. The single-ended input impedance is 50
.
19
20
GND
Same as pin 2.
MIXER RF
IN-
GND
LNA OUT
Same as pin 18, except complementary input.
See pin 18.
21
22
Same as pin 2.
LNA Output pin. This pin is internally DC blocked and matched to 50
in order to facilitate an easy interface to a 50
Image Filter.
Same as pin 2.
See pin 3.
23
24
GND
BYPASS
IF circuitry bypass pin. This pin should be well bypassed at the IF fre-
quency in order to achieve specified FM (IF2) noise figure. The ground
side of the bypass capacitor should connect immediately to ground
plane. 1000pF is the suggested value. Smaller values will begin to
slightly degrade noise figure. Larger values will slow down the IF1 to
IF2 switching times.
LO
BUFFER
ENABLE
30 k
LO
BUFFER
OUT
BIAS
MIXER
RF IN-
MIXER
RF IN+
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