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參數(shù)資料
| 型號(hào)： | RF3V49092 |
| 廠商： | INTERSIL CORP |
| 元件分類： | JFETs |
| 英文描述： | 20A/10A, 12V, 0.060/0.140 Ohm, Logic Level, Complementary Power MOSFET |
| 中文描述： | 20 A, 12 V, 0.06 ohm, 2 CHANNEL, N AND P-CHANNEL, Si, POWER, MOSFET |
| 封裝： | TS-001AA, 5 PIN |
| 文件頁數(shù)： | 8/13頁 |
| 文件大小： | 244K |
| 代理商： | RF3V49092 |
4-37
FIGURE 25. FORWARD BIAS SAFE OPERATING AREA
FIGURE 26. PEAK CURRENT CAPABILITY
NOTE:
FIGURE 27. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 28. SATURATION CHARACTERISTICS
FIGURE 29. TRANSFER CHARACTERISTICS
FIGURE 30. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
Typical Performance Curves (P-Channel)
(Continued)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-1
-10
-50
-1
-100
-10
I
D
,
LIMITED BY r
DS(ON)
AREA MAY BE
OPERATION IN THIS
5ms
10ms
100ms
1s
DC
T
J
= MAX RATED, T
C
= 25
o
C
t, PULSE WIDTH (s)
-200
-1
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
V
GS
= -5V
-10
I
D
,
V
GS
= -10V
I
=
I
25
175 - T
C
150
FOR TEMPERATURES
ABOVE 25
C DERATE PEAK
CURRENT AS FOLLOWS:
T
C
= 25
o
C
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
-100
0.1
1
100
-10
0.01
-100
-1
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R
≠
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
- V
DD
) +1]
If R = 0
I
A
,
t
AV
, TIME IN AVALANCHE (ms)
STARTING T
J
= 25
o
C
STARTING T
J
= 150
o
C
10
0
-10
-20
0
-1
-2
-3
-4
-7
-30
-40
V
GS
= -4V
I
D
,
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
= -10V
V
GS
= -5V
V
GS
= -3V
V
GS
= -4.5V
PULSE DURATION = 80
μ
s,
T
C
= 25
C
DUTY CYCLE = 0.5% MAX
-5
-6
25
o
C
0
-4
-6
-8
-10
-2
V
GS
, GATE TO SOURCE VOLTAGE (V)
0
-10
-20
-30
-40
175
o
C
I
D
,
-55
o
C
V
DD
= -6V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
100
200
300
400
500
0
0
-4
-6
-8
-10
V
GS
, GATE TO SOURCE VOLTAGE (V)
r
D
,
I
D
= -3A
-2
I
D
= -10A
I
D
= -6A
O
)
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
RF3V49092, RF3S49092SM
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