
11-221
RF2945
Rev A10 000919
11
T
* LVL ADJ pin must be low to disable transmitter.
Pin
28
Function
VCC1
Description
This pin is used to supply DC bias to the LNA, Mixer, 1st IF Amp and
Bandgap reference. A RF bypass capacitor should be connected
directly to this pin and returned to ground. A 22pF capacitor is recom-
mended for 915MHz applications. A 68pF capacitor is recommended
for 433MHz applications.
Demodulated data output from the demodulator. Output levels on this
are TTL/CMOS compatible. The magnitude of the load impedance is
intended to be 1M
or greater.
Interface Schematic
29
DATA OUT
30
This pin is used to supply DC bias and collector current to the transmit-
ter PA. It also supplies voltage to the 2
nd
IF Amplifier, Demod and data
slicer. A RF bypass capacitor should be connected directly to this pin
and returned to ground. A 22pF capacitor is recommended for 915MHz
applications. A 68pF capacitor is recommended for 433MHz applica-
tions.
This pin is used to vary the transmitter output power. An output level
adjustment range greater than 12dB is provided through analog volt-
age control of this pin. DC current of the transmitter power amp ia also
reduced with output power.
NOTE: This pin MUST be low when the transmitter is disabled.
31
LVL ADJ
32
RX ENABL
Enable pin for the receiver circuits. RX ENABL>2.0V powers up all
receiver functions. RX ENABL<1.0V turns off all receiver functions
except the PLL functions and the RF mixer.
Operation
Mode
Sleep Mode
Transmit Mode
Receive Mode
TX ENABL
RX ENABL
Function
Low
High
Low
High
Low
Low
High
High
Entire chip is powered down. Total current consumption is <1
μ
A. *
Transmitter, VCO are on.
Receiver, VCO are on. *
VCO is on. This mode allows time for a synthesizer loop to lock without
spending current on the transmitter or receiver.
PLL Lock
DATA OUT
400
4 k
LVL ADJ
40 k
50 k
RX ENABL