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參數(shù)資料
| 型號： | RF2161PCBA |
| 廠商： | RF Micro Devices, Inc. |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | 3V W-CDMA POWER 1900MHZ 3V LINEAR POWER AMPLIFIER |
| 中文描述： | 3V的的W - CDMA功率1900MHZ 3V的線性功率放大器 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 150K |
| 代理商： | RF2161PCBA |
Preliminary
2-199
RF2161
Rev A3 010514
2
P
Pin
1
Function
VCC2
Description
Power supply for second stage and interstage match. Pins 1, 15 and 16
should be connected by a common trace where the pins contact the
printed circuit board.
Ground for second stage. For best performance, keep traces physically
short and connect immediately to ground plane. This ground should be
isolated from the backside ground contact.
Power supply for first stage and interstage match. V
CC
should be fed
through a 1.2nH inductor terminated with a 8.2pF capacitor on the sup-
ply side. The inductor should be as close to the pin as possible.
RF input. An external series capacitor is required as a DC block. The
input match can be improved to <2:1 by using a series capacitor and
shunt inductor.
Interface Schematic
2
GND2
3
VCC1
See pin 4.
4
RF IN
5
GND1
Ground for first stage. For best performance, keep traces physically
short and connect immediately to ground plane. This ground should be
isolated from the backside ground contact.
Power Down control for first and second stages. When this pin is “l(fā)ow”,
all first and second stage circuits are shut off. When this pin is 2.8V, all
first and second stage circuits operate normally. V
PD1
requires a regu-
lated 2.8V for the amplifier to operate properly over all specified tem-
perature and voltage ranges. A dropping resistor from a higher
regulated voltage may be used to provide the required 2.8V.
V
MODE
adjusts the bias to the 2nd and 3rd stages. For full power oper-
ation, MODE is set low. When operating in a lower output power mode
(<+25dBm) this pin is set high to reduce bias current by up to 50%. An
external series resistor is optional to limit the amount of current
required. At low temperature (-30
ο
C), it is recommended to set V
MODE
low to maintain correct operation.
Power Down control for third stage. When this pin is “l(fā)ow”, all and third
stage circuits are shut off. When this pin is 2.8V, all and third stage cir-
cuits operate normally. V
PD
requires a regulated 2.8V for the amplifier
to operate properly over all specified temperature and voltage ranges.
A dropping resistor from a higher regulated voltage may be used to pro-
vide the required 2.8V. A 15pF high frequency bypass capacitor is rec-
ommended.
For best performance, keep traces physically short and connect imme-
diately to ground plane. This ground should be isolated from the back-
side ground contact.
RF output and power supply for final stage. This is the unmatched col-
lector output of the third stage. A DC block is required following the
matching components. The biasing may be provided via a parallel L-C
set for resonance at the operating frequency of 1920MHz to 1980MHz.
It is important to select an inductor with very low DC resistance with a
1A current rating. Alternatively, shunt microstrip techniques are also
applicable and provide very low DC resistance. Low frequency bypass-
ing is required for stability.
Same as pin 10.
See pin 4.
6
VPD1
7
VMODE
8
VPD2
9
GND
10
RF OUT
11
12
13
RF OUT
RF OUT
2FO
See pin 10.
Same as pin 10.
See pin 10.
Second harmonic trap. Keep traces physically short and connect imme-
diately to ground plane. This ground should be isolated from backside
ground contact.
Supply for bias reference and control circuits. High frequency bypass-
ing may be necessary.
Same as Pin 1.
14
VCC
15
16
VCC2
VCC2
Same as Pin 1.
GND1
RF IN
VCC1
From Bias
Stages
RF OUT
From Bias
Stages
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