
2-181
RF2155
Rev B3 010417
2
P
Pin
1
2
Function
NC
VCC1
Description
Not internally connected.
Interface Schematic
Positive supply for the first stage (driver) amplifier. This is an
unmatched transistor collector output. This pin should see an inductive
path to AC ground (V
CC
with a UHF bypassing capacitor). This induc-
tance can be achieved with a short, thin microstrip line (approximately
equivalent to 0.4nH). At lower frequencies, the inductance value should
be larger (longer microstrip line) and V
CC
should be bypassed with a
larger bypass capacitor. This inductance forms a matching network
with the amplifier stages, setting the amplifier's frequency of maximum
gain. An additional 1
μ
F bypass capacitor in parallel with the UHF
bypass capacitor is also recommended, but placement of this compo-
nent is not as critical. A resistor of 39
 from this pin to pin 3 is neces-
sary to ensure stability under extreme output VSWR conditions.
Positive supply for the bias circuits. This pin should be bypassed with a
single UHF capacitor, placed as close as possible to the package.
Ground connection. Keep traces physically short and connect immedi-
ately to the ground plane for best performance.
Same as pin 4.
3
VCC2
4
GND
5
6
GND
GND1
Ground return for the first stage; this should be connected to a via very
close to the device.
Amplifier RF input. This is a 50
 RF input port to the amplifier. To
improve the input match over all four gain control settings, an input
inductor of 6.8nH should be added. The amplifier does not contain
internal DC blocking and, therefore, should be externally DC blocked
before connecting to any device which has DC present or which con-
tains a DC path to ground. A series UHF capacitor is recommended for
the DC blocking.
Power down control voltage. When this pin is at 0V, the device will be in
power down mode, dissipating minimum DC power. When this pin is at
3V the device will be in full power mode delivering maximum available
gain and output power capability. This pin should not, in any circum-
stance, be higher than 3.3V. This pin should also have an external UHF
and HF bypassing capacitor.
7
RF IN
See pin 2.
8
PD
9
NC
NC
Not internally connected.
10
11
Not internally connected.
RF OUT
Amplifier RF output. This is an unmatched collector output of the final
amplifier transistor. It is internally connected to pins 11 and 14 to pro-
vide low series inductance and flexibility in output matching. Bias for
the final power amplifier output transistor must also be provided
through one of these pins. Typically, pin 14 is used to supply bias. A
transmission line of approximately 500mils length, followed by a
bypass capacitor, is adequate. This pin can also be used to create a
second harmonic trap. A UHF and large tantalum (1
μ
F) capacitor
should be placed on the power supply side of the bias inductor. Pin 11
should be used for the RF output with a matching network that presents
the optimum load impedance to the PA for maximum power and effi-
ciency, as well as providing DC blocking at the output.
Same as pin 4.
12
13
14
15
GND
GND
RF OUT
G8
Same as pin 4.
Same as pin 11.
RF output power gain control 8dB bit (see specification table for logic).
The control voltage at this pin should never exceed 3.3V and a logic
high should be at least 2.7V. This pin should also have an external UHF
bypassing capacitor.
RF IN
VCC1
From Bias
Stages
PD
To RF
Stages
RF OUT
From Bias
Stages
Gxx
VCC2
To RF
Stages