參數(shù)資料
型號: REF3333AIDCKT
廠商: TEXAS INSTRUMENTS INC
元件分類: 基準電壓源/電流源
英文描述: 1-OUTPUT THREE TERM VOLTAGE REFERENCE, 3.3 V, PDSO3
封裝: GREEN, SC-70, 3 PIN
文件頁數(shù): 19/20頁
文件大?。?/td> 580K
代理商: REF3333AIDCKT
www.ti.com
APPLICATIONS INFORMATION
SUPPLY VOLTAGE
START-UP TIME
V
IN
REF33xx
GND
V
OUT
1.2V
Bandgap
BASIC CONNECTIONS
REF33xx
V
IN
V
OUT
V
OUT
V
IN
C
BYPASS
1 Fto10 F
(recommended)
m
C
L
0.1 Fto10 F
m
GND
1V/div
Time(400 s/div)
m
V
IN
0.1 F
m
1 F
m
10 F
m
TEMPERATURE DRIFT
Drift=
V
-
OUTMAX
OUTMIN
V
TempRange
OUT
10 (ppm)
6
(1)
SBOS392A – AUGUST 2007 – REVISED SEPTEMBER 2007
The REF33xx is a family of low-power, precision
bandgap voltage references that are specifically
The REF33xx family of voltage references features
designed for excellent initial voltage accuracy with a
extremely
low
dropout
voltage,
except
for
the
high output current. Figure 17 shows a simplified
REF3312. The REF3312 has a minimum supply
block diagram of the REF33xx.
requirement of 1.8V. These references can be
operated with a supply 110mV above the output
voltage with a 5mA load (typical). For loaded
conditions, a typical dropout voltage versus load
graph is illustrated in Figure 4 of the Typical
Characteristics.
If the supply voltage connected to the IN pin is rapidly
moved while the
REF33xx
is
connected
to
a
capacitive load, a reverse voltage may discharge
through the OUT pin and into the REF33xx device.
This voltage will not damage the REF33xx, provided
that it is less than or equal to 5V.
The REF33xx features an advanced start-up circuit.
Start-up time is almost independent of load (with a
Figure 17. REF33xx Simplified Block Diagram
0.1
μF to 10μF load). Upon start-up, the current boost
circuit forces the output voltage. When the preset
voltage is reached, the REF33xx switches to the
second stage of output circuitry to precisely set the
output voltage. Figure 19 shows the start-up time of
Figure 18 shows the typical connections for the
the REF3325 for three different capacitive loads. In
REF33xx. A recommended supply bypass capacitor
all three cases, the output voltage settles within 2ms.
ranging between 1
μF to 10μF is recommended. The
total capacitive load at the output must be between
0.1
μF to 10μF to ensure output stability.
Figure 18. Basic Connections
Figure 19. Start-Up Time
The REF33xx is designed for minimal drift error,
defined as the change in output voltage over
temperature. The drift is calculated using the box
method, as described in Equation 1:
8
Copyright 2007, Texas Instruments Incorporated
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